diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2023-11-01 15:52:03 -0500 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-11-03 15:32:43 +0000 |
| commit | 6c705e766f7f4462da7af1817925bb6d20518d15 (patch) | |
| tree | 1326d5cf56588f0c36c0ceb1a4a9630c605cd0a6 /src | |
| parent | 3c83995ff99fd6aa4e20249e7e34da0b32a89a5f (diff) | |
mb/google/puff/var/*: Set LAN/WLAN device type to generic
Change the LAN/WiFi device types from PCI to generic, so that the bogus
PCI device and function values don't end up in coreboot's internal
device tree. The presence of these bogus PCI devices cause the LPI
constraint generator to create a reference for an ACPI device which does
not exist (SB.PCI0.RP{xx}.MCHC). The invalid reference(s) cause a
Windows BSOD (INTERNAL_POWER_ERROR).
TEST=build/boot Win11 on google/puff (wyvern). Verify LAN/WLAN devices
function correctly under Windows and Linux.
Change-Id: Ibc5f96250edb358d0517bd3840bf5604defe0b39
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78870
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src')
11 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/google/puff/variants/ambassador/overridetree.cb b/src/mainboard/google/puff/variants/ambassador/overridetree.cb index 8b6a9ae1b1..93e1c0461c 100644 --- a/src/mainboard/google/puff/variants/ambassador/overridetree.cb +++ b/src/mainboard/google/puff/variants/ambassador/overridetree.cb @@ -396,7 +396,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end register "PcieRpSlotImplemented[6]" = "1" end # RTL8111H Ethernet NIC diff --git a/src/mainboard/google/puff/variants/baseboard/devicetree.cb b/src/mainboard/google/puff/variants/baseboard/devicetree.cb index 6a32bdc142..b7a9674317 100644 --- a/src/mainboard/google/puff/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/puff/variants/baseboard/devicetree.cb @@ -323,7 +323,7 @@ chip soc/intel/cannonlake device pci 1d.5 on chip drivers/wifi/generic register "wake" = "GPE0_DW1_01" - device pci 00.0 on end + device generic 0 on end end register "PcieRpSlotImplemented[13]" = "1" end # PCI Express Port 14 (x4) diff --git a/src/mainboard/google/puff/variants/duffy/overridetree.cb b/src/mainboard/google/puff/variants/duffy/overridetree.cb index b1c50a2701..4681e5e489 100644 --- a/src/mainboard/google/puff/variants/duffy/overridetree.cb +++ b/src/mainboard/google/puff/variants/duffy/overridetree.cb @@ -455,7 +455,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end register "PcieRpSlotImplemented[6]" = "1" end # RTL8111H Ethernet NIC diff --git a/src/mainboard/google/puff/variants/faffy/overridetree.cb b/src/mainboard/google/puff/variants/faffy/overridetree.cb index 83f0c166e8..91d7482ae2 100644 --- a/src/mainboard/google/puff/variants/faffy/overridetree.cb +++ b/src/mainboard/google/puff/variants/faffy/overridetree.cb @@ -429,7 +429,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end register "PcieRpSlotImplemented[6]" = "1" end # RTL8111H Ethernet NIC diff --git a/src/mainboard/google/puff/variants/genesis/overridetree.cb b/src/mainboard/google/puff/variants/genesis/overridetree.cb index 6458f9f3f5..da7648725e 100644 --- a/src/mainboard/google/puff/variants/genesis/overridetree.cb +++ b/src/mainboard/google/puff/variants/genesis/overridetree.cb @@ -426,7 +426,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end end device pci 1c.7 on # PCI Root Port 8 (WLAN) diff --git a/src/mainboard/google/puff/variants/kaisa/overridetree.cb b/src/mainboard/google/puff/variants/kaisa/overridetree.cb index 6a2dd7b3af..19f0823901 100644 --- a/src/mainboard/google/puff/variants/kaisa/overridetree.cb +++ b/src/mainboard/google/puff/variants/kaisa/overridetree.cb @@ -455,7 +455,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end register "PcieRpSlotImplemented[6]" = "1" end # RTL8111H Ethernet NIC diff --git a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb index a89c56dde6..9c6ea6489e 100644 --- a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb +++ b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb @@ -428,7 +428,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end end device pci 1c.7 on # PCI Root Port 8 (WLAN) diff --git a/src/mainboard/google/puff/variants/noibat/overridetree.cb b/src/mainboard/google/puff/variants/noibat/overridetree.cb index 91a193977c..b81c4e489d 100644 --- a/src/mainboard/google/puff/variants/noibat/overridetree.cb +++ b/src/mainboard/google/puff/variants/noibat/overridetree.cb @@ -366,7 +366,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end register "PcieRpSlotImplemented[6]" = "1" end # RTL8111H Ethernet NIC diff --git a/src/mainboard/google/puff/variants/puff/overridetree.cb b/src/mainboard/google/puff/variants/puff/overridetree.cb index 3cd6a01d21..51832021d8 100644 --- a/src/mainboard/google/puff/variants/puff/overridetree.cb +++ b/src/mainboard/google/puff/variants/puff/overridetree.cb @@ -390,7 +390,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end register "PcieRpSlotImplemented[6]" = "1" end # RTL8111H Ethernet NIC diff --git a/src/mainboard/google/puff/variants/scout/overridetree.cb b/src/mainboard/google/puff/variants/scout/overridetree.cb index 5462e9b700..4c13e61fa4 100644 --- a/src/mainboard/google/puff/variants/scout/overridetree.cb +++ b/src/mainboard/google/puff/variants/scout/overridetree.cb @@ -406,7 +406,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end end device pci 1c.7 on # PCI Root Port 8 (WLAN) diff --git a/src/mainboard/google/puff/variants/wyvern/overridetree.cb b/src/mainboard/google/puff/variants/wyvern/overridetree.cb index 60ba0bcf51..de3704c888 100644 --- a/src/mainboard/google/puff/variants/wyvern/overridetree.cb +++ b/src/mainboard/google/puff/variants/wyvern/overridetree.cb @@ -391,7 +391,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" register "enable_aspm_l1_2" = "1" - device pci 00.0 on end + device generic 0 on end end register "PcieRpSlotImplemented[6]" = "1" end # RTL8111H Ethernet NIC |