diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-24 16:37:05 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-01 21:05:47 +0200 |
| commit | 6aa45c090bf8f52fd531f24d3347fdbf70f3b7a8 (patch) | |
| tree | 12909b5f5b41cc56e116986408dd4a5a03de0a41 /src | |
| parent | e1a022ade46a6b8885e52b680f790235547242d8 (diff) | |
AGESA boards: Fix split to romstage and ramstage
Boards broken with commit:
062ef1c AGESA boards: Split dispatcher to romstage and ramstage
Boot failure with asus/f2a85-m witnessed around MemMS3Save() call,
message "Save memory S3 data in heap" in verbose agesa logs was
replaced by a system reset.
Default stubs for MemS3ResumeConstructNBBlock() returned TRUE
without initializing the block contents. This would not work for case
with multiple NB support built into same firmware.
MemMCreateS3NbBlock() then returned with S3NBPtr!=NULL with uninitialized
data and MemMContextSave() referenced those as invalid pointers.
There is no reason to prevent booting in the case S3 resume data is not
passed to ramstage, so remove the ASSERT(). It only affects builds with
IDSOPT_IDS_ENABLED=TRUE anyways.
Change-Id: I8fd1e308ceab2b6f4b4c90f0f712934c2918d92d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15344
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Diffstat (limited to 'src')
4 files changed, 2 insertions, 4 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h index e1c47ee485..0cb25b8767 100644 --- a/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h +++ b/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h @@ -124,7 +124,7 @@ BOOLEAN MemFS3DefConstructorRet ( IN UINT8 NodeID ) { - return TRUE; + return FALSE; } #if (OPTION_MEMCTLR_DR == TRUE) diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c index 244420ded8..ab1ce1a696 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c @@ -319,7 +319,6 @@ MemMS3Save ( if (RefPtr->MemContext.NvStorage == NULL) { // Memory context cannot be saved succesfully - ASSERT (FALSE); return FALSE; } } diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h index 647c3709f1..8269742315 100644 --- a/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h +++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h @@ -124,7 +124,7 @@ BOOLEAN MemFS3DefConstructorRet ( IN UINT8 NodeID ) { - return TRUE; + return FALSE; } #if (OPTION_MEMCTLR_TN == TRUE) diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c index 3d80bafded..248e98c12c 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c @@ -576,7 +576,6 @@ MemMS3Save ( if (RefPtr->MemContext.NvStorage == NULL) { // Memory context cannot be saved succesfully - ASSERT (FALSE); return FALSE; } } |