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authorGaggery Tsai <gaggery.tsai@intel.com>2017-11-23 13:23:57 +0800
committerFurquan Shaikh <furquan@google.com>2017-12-04 18:12:15 +0000
commit61c817d0af3db14a69d3dbf9285e9670097893e1 (patch)
treec8755fe83a46ab34dacf25f4a3fd2cab3c8d2f67 /src
parent9b8ef11f00e895cf55e80f3a762ffb7cf500cc07 (diff)
mb/google/fizz: Enable Wake-on-Lan feature
This patch enables WOL feature. BUG=b:69290148 BRANCH=None TEST=powerd_dbus_suspend && sudo etherwake -i eth0 $MAC to make sure the system could be woken up by WOL packet. Change-Id: I1178a776db2cdb448fe6650d49ae6c0281ac1128 Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Reviewed-on: https://review.coreboot.org/22606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/fizz/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index df664b2e2c..55d59fe96a 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -291,6 +291,7 @@ chip soc/intel/skylake
device pci 1c.0 on # PCI Express Port 1
chip drivers/net
register "customized_leds" = "0x0fa7"
+ register "wake" = "GPE0_PCI_EXP"
device pci 00.0 on end
end
end # PCI Express Port 1