diff options
author | Sean Rhodes <sean@starlabs.systems> | 2023-04-13 12:17:38 +0100 |
---|---|---|
committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-04-20 20:42:41 +0000 |
commit | 5f0cda7e91f5aeba56442b90fbafbb1eb0b54930 (patch) | |
tree | 4cad120811eda8a7555688fae3bc1cb8a692917c /src | |
parent | aa8c6a22e58826a3f72e9ce8147501537b5d1010 (diff) |
soc/intel/tigerlake: Replace SOC_INTEL_TIGERLAKE_S3 with D3COLD_SUPPORT
The Kconfig option SOC_INTEL_TIGERLAKE_S3 suggests that it's doing
something with S3, but it's actually disabling D3Cold support.
Remove it, and instead use D3COLD_SUPPORT so it's clear what the
option is doing.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Id43f3e5c8620d474831cc02fcecebd8aac961687
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74405
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/starlabs/starbook/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/Kconfig | 6 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/acpi/tcss.asl | 4 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/acpi/tcss_dma.asl | 12 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/acpi/tcss_pcierp.asl | 12 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/acpi/tcss_xhci.asl | 8 |
6 files changed, 18 insertions, 25 deletions
diff --git a/src/mainboard/starlabs/starbook/Kconfig b/src/mainboard/starlabs/starbook/Kconfig index 17be0a29a3..5ad7e2747f 100644 --- a/src/mainboard/starlabs/starbook/Kconfig +++ b/src/mainboard/starlabs/starbook/Kconfig @@ -48,7 +48,6 @@ config BOARD_STARLABS_STARBOOK_TGL select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES select SOC_INTEL_TIGERLAKE - select SOC_INTEL_TIGERLAKE_S3 select SPI_FLASH_WINBOND select TPM_MEASURED_BOOT diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 9928591ab9..9bca89513a 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -208,12 +208,6 @@ config SOC_INTEL_I2C_DEV_MAX int default 6 -config SOC_INTEL_TIGERLAKE_S3 - bool - default n - help - Select if using S3 instead of S0ix to disable D3Cold - config SOC_INTEL_UART_DEV_MAX int default 3 diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index be9d306f6e..98337a3e5e 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -676,7 +676,7 @@ Scope (\_SB.PCI0) } } -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Method (TCON, 0) { /* Reset IOM D3 cold bit if it is in D3 cold now. */ @@ -787,7 +787,7 @@ Scope (\_SB.PCI0) STAT = 0 } } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT /* * TCSS xHCI device diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl index 3c19ef621e..bbb0b6a1ad 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl @@ -27,11 +27,11 @@ Name (STAT, 0x1) /* Variable to save power state 1 - D0, 0 - D3C */ Method (_S0W, 0x0) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Return (0x04) #else Return (0x03) -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT } /* @@ -40,7 +40,7 @@ Method (_S0W, 0x0) */ Method (_PR0) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If (DUID == 0) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -52,12 +52,12 @@ Method (_PR0) } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT } Method (_PR3) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If (DUID == 0) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -69,7 +69,7 @@ Method (_PR3) } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT } /* diff --git a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl index fda58e70cf..6dbde46f49 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl @@ -247,16 +247,16 @@ Method (_PS3, 0, Serialized) Method (_S0W, 0x0, NotSerialized) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Return (0x4) #else Return (0x3) -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT } Method (_PR0) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If ((TUID == 0) || (TUID == 1)) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -268,12 +268,12 @@ Method (_PR0) } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT } Method (_PR3) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If ((TUID == 0) || (TUID == 1)) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -285,7 +285,7 @@ Method (_PR3) } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT } /* diff --git a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl index a3b8c8faf7..ddc5a6665d 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl @@ -30,11 +30,11 @@ Method (_PS3, 0, Serialized) Method (_S0W, 0x0, NotSerialized) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Return (0x4) #else Return (0x3) -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT } /* @@ -43,7 +43,7 @@ Method (_S0W, 0x0, NotSerialized) */ Name (SD3C, 0) -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Method (_PR0) { Return (Package () { \_SB.PCI0.D3C }) @@ -53,7 +53,7 @@ Method (_PR3) { Return (Package () { \_SB.PCI0.D3C }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT /* * XHCI controller _DSM method |