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authorSathyanarayana Nujella <sathyanarayana.nujella@intel.com>2017-12-01 11:06:38 -0800
committerMartin Roth <martinroth@google.com>2017-12-07 02:35:14 +0000
commit5c04a111e584ddc08d4e45e637318346f433082e (patch)
treeaedc3b623b364113dd35c4d8fad5bc43e356ba4c /src
parentea629fa8c4b874fb7cd2d5806893189d700c90be (diff)
mainboard/intel/glkrvp: Ignore Audio DMIC IOSSTATE
Audio DMIC_CLK needs to be ON in S0ix to support Wake on Voice. So, configuring GPIO_171 to be as IGNORE IOSSTATE, so that clock is ON in S0ix state. BUG=None TEST=put DUT in S0ix, verified DMIC_CLK in scope when wov capture path is ON Change-Id: I147cf3c12acb11429c6cb234e8c511f57886b6b4 Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/22675 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
index f6437a2d7e..0361ec7172 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
@@ -204,7 +204,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_168, DN_20K, DEEP, NF2, HIZCRx1, SAME),/* AVS_I2S2_SDI*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_169, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S2_SD0*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_170, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S1_MCLK*/
- PAD_CFG_NF_IOSSTATE(GPIO_171, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_M_CLK_A1*/
+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_171, DN_20K, DEEP, NF1),/*AVS_M_CLK_A1*/
PAD_CFG_NF_IOSSTATE(GPIO_172, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_M_CLK_B1*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_173, DN_20K, DEEP, NF1, HIZCRx1, ENPD),/*AVS_M_DATA_1*/
PAD_CFG_NF_IOSSTATE(GPIO_174, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_M_CLK_AB2*/