diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2021-01-16 14:55:58 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-18 07:35:14 +0000 |
| commit | 59ab203f1c44146d4dee8691c7777664975e03cc (patch) | |
| tree | 32d4312a7770a190c20cb1ce54bba5813a8cfd7b /src | |
| parent | 1a8d0e58862517d30939d419808692250cd555ce (diff) | |
soc/intel/skylake/chip.h: Remove repeated word
Change-Id: Id5bf9255e9a16a4f311e3b15eb77ad6e4bb13f66
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49518
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/skylake/chip.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 027a2e29e4..e5592b4358 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -307,7 +307,7 @@ struct soc_intel_skylake_config { u8 LockDownConfigGlobalSmi; /* * Enable RTC lower and upper 128 byte Lock bits to lock Bytes 38h-3Fh - * in the upper and and lower 128-byte bank of RTC RAM. + * in the upper and lower 128-byte bank of RTC RAM. */ u8 LockDownConfigRtcLock; |