Make the device tree available in the rom stage

We thought about two ways to do this change. The way we decided to try
was to
1. drop all ops from devices in romstage
2. constify all devices in romstage (make them read-only) so we can
   compile static.c into romstage
3. the device tree "devices" can be used to read configuration from
   the device tree (and nothing else, really)
4. the device tree devices are accessed through struct device * in
   romstage only. device_t stays the typedef to int in romstage
5. Use the same static.c file in ramstage and romstage

We declare structs as follows:
ROMSTAGE_CONST struct bus dev_root_links[];
ROMSTAGE_CONST is const in romstage and empty in ramstage; This
forces all of the device tree into the text area.

So a struct looks like this:
static ROMSTAGE_CONST struct device _dev21 = {
 #ifndef __PRE_RAM__
        .ops = 0,
 #endif
        .bus = &_dev7_links[0],
        .path = {.type=DEVICE_PATH_PCI,{.pci={ .devfn = PCI_DEVFN(0x1c,3)}}},
        .enabled = 0,
        .on_mainboard = 1,
        .subsystem_vendor = 0x1ae0,
        .subsystem_device = 0xc000,
        .link_list = NULL,
        .sibling = &_dev22,
 #ifndef __PRE_RAM__
        .chip_ops = &southbridge_intel_bd82x6x_ops,
 #endif
        .chip_info = &southbridge_intel_bd82x6x_info_10,
        .next=&_dev22
};

Change-Id: I722454d8d3c40baf7df989f5a6891f6ba7db5727
Signed-off-by: Ronald G. Minnich <rminnich@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1398
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

8 files changed, 122 insertions, 13 deletions

diff --git a/src/arch/x86/include/stddef.h b/src/arch/x86/include/stddef.h
index a6c3fc6e15..fc89de54de 100644
--- a/src/arch/x86/include/stddef.h
+++ b/src/arch/x86/include/stddef.h
@@ -15,4 +15,10 @@ typedef unsigned int wint_t;
 
 #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
 
+#ifdef __PRE_RAM__
+#define ROMSTAGE_CONST const
+#else
+#define ROMSTAGE_CONST
+#endif
+
 #endif /* I386_STDDEF_H */
diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c
index 6bb053d7a1..0348a9f746 100644
--- a/src/cpu/amd/agesa/s3_resume.c
+++ b/src/cpu/amd/agesa/s3_resume.c
@@ -29,7 +29,9 @@
 #endif
 #include <device/device.h>
 #include <device/pci.h>
+#ifndef __PRE_RAM__
 #include <device/pci_ops.h>
+#endif
 #include <arch/io.h>
 #include <arch/acpi.h>
 #include <string.h>
diff --git a/src/devices/Makefile.inc b/src/devices/Makefile.inc
index 9ffc0bb921..9a2f71e683 100644
--- a/src/devices/Makefile.inc
+++ b/src/devices/Makefile.inc
@@ -11,6 +11,8 @@ ramstage-y += pnp_device.c
 ramstage-y += pci_ops.c
 ramstage-y += smbus_ops.c
 
+romstage-y+= device_romstage.c
+
 subdirs-y += oprom
 
 ifeq ($(CONFIG_PCI_ROM_RUN),y)
diff --git a/src/devices/device_romstage.c b/src/devices/device_romstage.c
new file mode 100644
index 0000000000..475f94aeaf
--- /dev/null
+++ b/src/devices/device_romstage.c
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2003-2004 Linux Networx
+ * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
+ * Copyright (C) 2003 Greg Watson <jarrah@users.sourceforge.net>
+ * Copyright (C) 2004 Li-Ta Lo <ollie@lanl.gov>
+ * Copyright (C) 2005-2006 Tyan
+ * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <device/device.h>
+#include <device/path.h>
+#include <device/pci.h>
+#include <device/resource.h>
+
+/** Linked list of ALL devices */
+ROMSTAGE_CONST struct device * ROMSTAGE_CONST all_devices = &dev_root;
+
+/**
+ * Given a PCI bus and a devfn number, find the device structure.
+ *
+ * @param bus The bus number.
+ * @param devfn A device/function number.
+ * @return Pointer to the device structure (if found), 0 otherwise.
+ */
+ROMSTAGE_CONST struct device *dev_find_slot(unsigned int bus,
+						unsigned int devfn)
+{
+	ROMSTAGE_CONST struct device *dev, *result;
+
+	result = 0;
+	for (dev = all_devices; dev; dev = dev->next) {
+		if ((dev->path.type == DEVICE_PATH_PCI) &&
+		    (dev->bus->secondary == bus) &&
+		    (dev->path.pci.devfn == devfn)) {
+			result = dev;
+			break;
+		}
+	}
+	return result;
+}
+
+/**
+ * Given an SMBus bus and a device number, find the device structure.
+ *
+ * @param bus The bus number.
+ * @param addr A device number.
+ * @return Pointer to the device structure (if found), 0 otherwise.
+ */
+ROMSTAGE_CONST struct device *dev_find_slot_on_smbus(unsigned int bus,
+							unsigned int addr)
+{
+	ROMSTAGE_CONST struct device *dev, *result;
+
+	result = 0;
+	for (dev = all_devices; dev; dev = dev->next) {
+		if ((dev->path.type == DEVICE_PATH_I2C) &&
+		    (dev->bus->secondary == bus) &&
+		    (dev->path.i2c.device == addr)) {
+			result = dev;
+			break;
+		}
+	}
+	return result;
+}
+
diff --git a/src/ec/lenovo/pmh7/pmh7.c b/src/ec/lenovo/pmh7/pmh7.c
index 844e233e9f..28f3814071 100644
--- a/src/ec/lenovo/pmh7/pmh7.c
+++ b/src/ec/lenovo/pmh7/pmh7.c
@@ -19,8 +19,12 @@
 
 #include <arch/io.h>
 #include <console/console.h>
+#ifndef __PRE_RAM__
+#ifndef __SMM__
 #include <device/device.h>
 #include <device/pnp.h>
+#endif
+#endif
 #include <stdlib.h>
 #include "pmh7.h"
 #include "chip.h"
diff --git a/src/include/device/device.h b/src/include/device/device.h
index 0b15ac5aed..b44a551d77 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -2,11 +2,12 @@
 #define DEVICE_H
 
 #include <stdint.h>
+#include <stddef.h>
 #include <device/resource.h>
 #include <device/path.h>
 
-
 struct device;
+#ifndef __PRE_RAM__
 typedef struct device * device_t;
 struct pci_operations;
 struct pci_bus_operations;
@@ -42,12 +43,14 @@ struct device_operations {
 	const struct smbus_bus_operations *ops_smbus_bus;
 	const struct pci_bus_operations *ops_pci_bus;
 };
+#endif
 
 
 struct bus {
-	device_t 	dev;		/* This bridge device */
-	device_t 	children;	/* devices behind this bridge */
-	struct bus	*next;		/* The next bridge on this device */
+
+	ROMSTAGE_CONST struct device * 	dev;		/* This bridge device */
+	ROMSTAGE_CONST struct device * 	children;	/* devices behind this bridge */
+	ROMSTAGE_CONST struct bus	*next;		/* The next bridge on this device */
 	unsigned	bridge_ctrl;	/* Bridge control register */
 	unsigned char	link_num;	/* The index of this link */
 	uint16_t	secondary; 	/* secondary bus number */
@@ -70,10 +73,12 @@ struct pci_irq_info {
 };
 
 struct device {
-	struct bus *	bus;		/* bus this device is on, for bridge
+	ROMSTAGE_CONST struct bus *	bus;		/* bus this device is on, for bridge
 					 * devices, it is the up stream bus */
-	device_t	sibling;	/* next device on this bus */
-	device_t	next;		/* chain of all devices */
+
+	ROMSTAGE_CONST struct device *	sibling;	/* next device on this bus */
+
+	ROMSTAGE_CONST struct device *	next;		/* chain of all devices */
 
 	struct device_path path;
 	unsigned 	vendor;
@@ -89,23 +94,24 @@ struct device {
 	u8 command;
 
 	/* Base registers for this device. I/O, MEM and Expansion ROM */
-	struct resource *resource_list;
+	ROMSTAGE_CONST struct resource *resource_list;
 
 	/* links are (downstream) buses attached to the device, usually a leaf
 	 * device with no children has 0 buses attached and a bridge has 1 bus
 	 */
-	struct bus *link_list;
+	ROMSTAGE_CONST struct bus *link_list;
 
 	struct device_operations *ops;
 	const struct chip_operations *chip_ops;
-	void *chip_info;
+	ROMSTAGE_CONST void *chip_info;
 };
 
 /**
  * This is the root of the device tree. The device tree is defined in the
  * static.c file and is generated by the config tool at compile time.
  */
-extern struct device	dev_root;
+extern ROMSTAGE_CONST struct device	dev_root;
+#ifndef __PRE_RAM__
 extern struct device	*all_devices;	/* list of all devices */
 
 extern struct resource	*free_resources;
@@ -195,5 +201,10 @@ void fixed_mem_resource(device_t dev, unsigned long index,
 
 void tolm_test(void *gp, struct device *dev, struct resource *new);
 u32 find_pci_tolm(struct bus *bus);
-
+#else
+ROMSTAGE_CONST struct device * dev_find_slot (unsigned int bus,
+						unsigned int devfn);
+ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus,
+							unsigned int addr);
+#endif
 #endif /* DEVICE_H */
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 51d52835fd..a215a2a028 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -16,9 +16,11 @@
 #define PCI_H
 
 #include <stdint.h>
+#include <stddef.h>
 #include <device/pci_def.h>
 #include <device/resource.h>
 #include <device/device.h>
+#ifndef __PRE_RAM__
 #include <device/pci_ops.h>
 #include <device/pci_rom.h>
 
@@ -107,4 +109,5 @@ static inline const struct pci_bus_operations *ops_pci_bus(struct bus *bus)
 unsigned mainboard_pci_subsystem_vendor_id(struct device *dev);
 unsigned mainboard_pci_subsystem_device_id(struct device *dev);
 
+#endif
 #endif /* PCI_H */
diff --git a/src/include/device/resource.h b/src/include/device/resource.h
index c28ada5242..ddedc2fd29 100644
--- a/src/include/device/resource.h
+++ b/src/include/device/resource.h
@@ -2,6 +2,7 @@
 #define DEVICE_RESOURCE_H
 
 #include <stdint.h>
+#include <stddef.h>
 
 #define IORESOURCE_BITS		0x000000ff	/* Bus-specific bits */
 
@@ -72,7 +73,7 @@ struct resource {
 	resource_t base;	/* Base address of the resource */
 	resource_t size;	/* Size of the resource */
 	resource_t limit;	/* Largest valid value base + size -1 */
-	struct resource* next;	/* Next resource in the list */
+	ROMSTAGE_CONST struct resource* next;	/* Next resource in the list */
 	unsigned long flags;	/* Descriptions of the kind of resource */
 	unsigned long index;	/* Bus specific per device resource id */
 	unsigned char align;	/* Required alignment (log 2) of the resource */