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authorSean Rhodes <sean@starlabs.systems>2022-09-07 16:31:10 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-10-11 14:47:49 +0000
commit558eafd5b09de4f28b19913d69b83ac26f09c392 (patch)
tree7625b62b6db3c4ae61969cc9823f7ce68ca0df56 /src
parent60fb9350be61604a260a520d26e0327bbd775070 (diff)
mb/starlabs/starbook/cml: Enable SRAM
Enable SRAM in devicetree so that resources are allocated properly for it. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I1d7ee4f950b31f2be6fb7bd107b5fe54785ed81a Reviewed-on: https://review.coreboot.org/c/coreboot/+/67420 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/starlabs/starbook/variants/cml/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb b/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb
index f9f59767e5..a1def8d3f5 100644
--- a/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb
+++ b/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb
@@ -86,6 +86,7 @@ chip soc/intel/cannonlake
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"
end
device pci 14.1 off end # USB xDCI (OTG)
+ device pci 14.2 on end # SRAM
device pci 14.3 on # CNVi
chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0"