diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2023-05-25 15:42:01 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-27 02:00:10 +0000 |
| commit | 49d8aa7043ea4c9c3f5c655007234b386ba33919 (patch) | |
| tree | 45d578d488d7970c2fceb5822c578263face9a1e /src | |
| parent | d6f73972cf7a1424ac81ffa5576aa233fb4d9b52 (diff) | |
soc/amd/common/block/psp: Unmap EFS region after use
EFS header is mapped during PSP verstage and bootblock to read some SPI
configuration. After use it is left unmapped. Unmap the EFS region after
use.
BUG=b:240664755
TEST=Build and boot to OS in Skyrim with unsigned PSP verstage.
Change-Id: I865f45a3d25bc639eb8435b54aa80895ec4afd27
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75455
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/common/block/psp/psp_efs.c | 34 |
1 files changed, 14 insertions, 20 deletions
diff --git a/src/soc/amd/common/block/psp/psp_efs.c b/src/soc/amd/common/block/psp/psp_efs.c index 709273e8d8..7227b9257a 100644 --- a/src/soc/amd/common/block/psp/psp_efs.c +++ b/src/soc/amd/common/block/psp/psp_efs.c @@ -7,31 +7,25 @@ #include <device/mmio.h> #include <types.h> -static struct embedded_firmware *efs; - -bool efs_is_valid(void) -{ - if (!efs) - efs = rdev_mmap(boot_device_ro(), EFS_OFFSET, sizeof(*efs)); - - if (!efs || efs->signature != EMBEDDED_FW_SIGNATURE) - return false; - - return true; -} - bool read_efs_spi_settings(uint8_t *mode, uint8_t *speed) { - if (!efs_is_valid()) + bool ret = false; + struct embedded_firmware *efs; + + efs = rdev_mmap(boot_device_ro(), EFS_OFFSET, sizeof(*efs)); + if (!efs) return false; + if (efs->signature == EMBEDDED_FW_SIGNATURE) { #ifndef SPI_MODE_FIELD - printk(BIOS_ERR, "Unknown cpu in psp_efs.h\n"); - printk(BIOS_ERR, "SPI speed/mode not set.\n"); - return false; + printk(BIOS_ERR, "Unknown cpu in psp_efs.h\n"); + printk(BIOS_ERR, "SPI speed/mode not set.\n"); #else - *mode = efs->SPI_MODE_FIELD; - *speed = efs->SPI_SPEED_FIELD; - return true; + *mode = efs->SPI_MODE_FIELD; + *speed = efs->SPI_SPEED_FIELD; + ret = true; #endif + } + rdev_munmap(boot_device_ro(), efs); + return ret; } |