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authorJason Glenesk <jason.glenesk@amd.corp-partner.google.com>2020-12-10 03:28:38 -0800
committerFelix Held <felix-coreboot@felixheld.de>2021-01-02 22:52:12 +0000
commit498015d62fd456725b299809c6403ca73546b42e (patch)
tree3cef00ca0c4f7e278e6fcaa5c19b34a99570b5b7 /src
parent61624b2d2de9e57d8fef1e1a1a923c8b00c21247 (diff)
soc/amd/picasso: Separate CPUID defs into new header
Move CPUID definitions out of msr.h into new cpuid.h header. BUG=b:155307433 BRANCH=Zork Change-Id: I2ed5e0a5a6dbdb38fce8bf3e769f680330718653 Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48533 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/cpu/amd/cpuid.h17
-rw-r--r--src/include/cpu/amd/msr.h5
-rw-r--r--src/soc/amd/picasso/acpi.c1
3 files changed, 18 insertions, 5 deletions
diff --git a/src/include/cpu/amd/cpuid.h b/src/include/cpu/amd/cpuid.h
new file mode 100644
index 0000000000..81f69a3249
--- /dev/null
+++ b/src/include/cpu/amd/cpuid.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* This file applies to AMD64 products.
+ * The definitions come from the AMD64 Programmers Manual vol2
+ * Revision 3.30 and/or the device's BKDG.
+ */
+
+#ifndef CPU_AMD_CPUID_H
+#define CPU_AMD_CPUID_H
+
+#define CPUID_EXT_PM 0x80000007
+#define CPUID_MODEL 1
+#define CPUID_EBX_CORE_ID 0x8000001E
+#define CPUID_EBX_THREADS_SHIFT 8
+#define CPUID_EBX_THREADS_MASK (0xFF << CPUID_EBX_THREADS_SHIFT)
+
+#endif /* CPU_AMD_CPUID_H */
diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h
index f9e7b2033d..78676de266 100644
--- a/src/include/cpu/amd/msr.h
+++ b/src/include/cpu/amd/msr.h
@@ -10,11 +10,6 @@
#include <cpu/x86/msr.h>
-#define CPUID_EXT_PM 0x80000007
-#define CPUID_MODEL 1
-#define CPUID_EBX_CORE_ID 0x8000001E
-#define CPUID_EBX_THREADS_SHIFT 8
-#define CPUID_EBX_THREADS_MASK (0xFF << CPUID_EBX_THREADS_SHIFT)
#define MC4_MISC0 0x00000413
#define MC4_MISC1 0xC0000408
#define MC4_MISC2 0xC0000409
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index 17940e9725..f5f111383e 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -12,6 +12,7 @@
#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
+#include <cpu/amd/cpuid.h>
#include <cpu/amd/msr.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>