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authorSubrata Banik <subratabanik@google.com>2022-03-10 19:12:02 +0530
committerSubrata Banik <subratabanik@google.com>2022-03-15 10:18:28 +0000
commit4703edc943985ad1429d48866cf8c070541df713 (patch)
tree1bb5edc7b089b1217bb65105ca3ad866191960f2 /src
parent47b836af96186af3cf207b0a2bc4d99ac832680d (diff)
{mb, soc}: Move mrc_cache invalidating logic into `memory` common code
Commit hash b8b40964 ( mb, soc: Add the SPD_CACHE_ENABLE) introduced per mainboard logic to invalidate the mrc_cache. This patch moves mrc_cache invalidating logic into IA common code and cleans up the code to remove unused argument `dimms_changed` from SoC and mainboard directory. BUG=b:200243989 BRANCH=firmware-brya-14505.B TEST=Able to build and boot redrix without any visible failure/errors. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I6f18e18adc6572571871dd6da1698186e4e3d671 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/romstage.c7
-rw-r--r--src/mainboard/intel/adlrvp/romstage_fsp_params.c7
-rw-r--r--src/mainboard/intel/shadowmountain/romstage.c3
-rw-r--r--src/mainboard/prodrive/atlas/romstage_fsp_params.c3
-rw-r--r--src/soc/intel/alderlake/include/soc/meminit.h2
-rw-r--r--src/soc/intel/alderlake/meminit.c4
-rw-r--r--src/soc/intel/common/block/include/intelblocks/meminit.h4
-rw-r--r--src/soc/intel/common/block/memory/meminit.c19
-rw-r--r--src/soc/intel/tigerlake/meminit.c3
9 files changed, 19 insertions, 33 deletions
diff --git a/src/mainboard/google/brya/romstage.c b/src/mainboard/google/brya/romstage.c
index 2560840307..4e88eca617 100644
--- a/src/mainboard/google/brya/romstage.c
+++ b/src/mainboard/google/brya/romstage.c
@@ -12,7 +12,6 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
const struct mb_cfg *mem_config = variant_memory_params();
bool half_populated = variant_is_half_populated();
struct mem_spd spd_info;
- bool dimms_changed = false;
memset(&spd_info, 0, sizeof(spd_info));
variant_get_spd_info(&spd_info);
@@ -20,11 +19,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
const struct pad_config *pads;
size_t pads_num;
- memcfg_init(memupd, mem_config, &spd_info, half_populated, &dimms_changed);
- if (dimms_changed) {
- memupd->FspmArchUpd.NvsBufferPtr = 0;
- memupd->FspmArchUpd.BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION;
- }
+ memcfg_init(memupd, mem_config, &spd_info, half_populated);
pads = variant_romstage_gpio_table(&pads_num);
gpio_configure_pads(pads, pads_num);
diff --git a/src/mainboard/intel/adlrvp/romstage_fsp_params.c b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
index 8a24529f49..e29b7d44c8 100644
--- a/src/mainboard/intel/adlrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
@@ -48,7 +48,6 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
const struct mb_cfg *mem_config = variant_memory_params();
int board_id = get_board_id();
const bool half_populated = false;
- bool dimms_changed = false;
const struct mem_spd memory_down_spd_info = {
.topo = MEM_TOPO_MEMORY_DOWN,
@@ -73,8 +72,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
case ADL_P_DDR4_1:
case ADL_P_DDR4_2:
case ADL_P_DDR5_1:
- memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated,
- &dimms_changed);
+ memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated);
break;
case ADL_P_DDR5_2:
case ADL_P_LP4_1:
@@ -84,8 +82,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
case ADL_M_LP4:
case ADL_M_LP5:
case ADL_N_LP5:
- memcfg_init(memupd, mem_config, &memory_down_spd_info, half_populated,
- &dimms_changed);
+ memcfg_init(memupd, mem_config, &memory_down_spd_info, half_populated);
break;
default:
die("Unknown board id = 0x%x\n", board_id);
diff --git a/src/mainboard/intel/shadowmountain/romstage.c b/src/mainboard/intel/shadowmountain/romstage.c
index eb08d18eed..fcd829f644 100644
--- a/src/mainboard/intel/shadowmountain/romstage.c
+++ b/src/mainboard/intel/shadowmountain/romstage.c
@@ -11,12 +11,11 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
{
const struct mb_cfg *mem_config = variant_memory_params();
const bool half_populated = false;
- bool dimms_changed = false;
const struct mem_spd lp5_spd_info = {
.topo = MEM_TOPO_MEMORY_DOWN,
.cbfs_index = variant_memory_sku(),
};
- memcfg_init(memupd, mem_config, &lp5_spd_info, half_populated, &dimms_changed);
+ memcfg_init(memupd, mem_config, &lp5_spd_info, half_populated);
}
diff --git a/src/mainboard/prodrive/atlas/romstage_fsp_params.c b/src/mainboard/prodrive/atlas/romstage_fsp_params.c
index fae7100b31..bd4c0a3c2b 100644
--- a/src/mainboard/prodrive/atlas/romstage_fsp_params.c
+++ b/src/mainboard/prodrive/atlas/romstage_fsp_params.c
@@ -31,7 +31,6 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
{
const struct mb_cfg *mem_config = &ddr5_mem_config;
const bool half_populated = false;
- bool dimms_changed = false;
const struct mem_spd dimm_module_spd_info = {
.topo = MEM_TOPO_DIMM_MODULE,
@@ -47,5 +46,5 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
},
};
- memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated, &dimms_changed);
+ memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated);
}
diff --git a/src/soc/intel/alderlake/include/soc/meminit.h b/src/soc/intel/alderlake/include/soc/meminit.h
index 6af0accb1b..bd75636e9b 100644
--- a/src/soc/intel/alderlake/include/soc/meminit.h
+++ b/src/soc/intel/alderlake/include/soc/meminit.h
@@ -110,6 +110,6 @@ struct mb_cfg {
};
void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg,
- const struct mem_spd *spd_info, bool half_populated, bool *dimms_changed);
+ const struct mem_spd *spd_info, bool half_populated);
#endif /* _SOC_ALDERLAKE_MEMINIT_H_ */
diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c
index 2c915ef9ee..d40ee35e73 100644
--- a/src/soc/intel/alderlake/meminit.c
+++ b/src/soc/intel/alderlake/meminit.c
@@ -236,7 +236,7 @@ static void ddr5_fill_dimm_module_info(FSP_M_CONFIG *mem_cfg, const struct mb_cf
}
void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg,
- const struct mem_spd *spd_info, bool half_populated, bool *dimms_changed)
+ const struct mem_spd *spd_info, bool half_populated)
{
struct mem_channel_data data;
bool dq_dqs_auto_detect = false;
@@ -280,7 +280,7 @@ void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg,
}
mem_populate_channel_data(memupd, &soc_mem_cfg[mb_cfg->type], spd_info, half_populated,
- &data, dimms_changed);
+ &data);
mem_init_spd_upds(mem_cfg, &data);
mem_init_dq_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect);
mem_init_dqs_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect);
diff --git a/src/soc/intel/common/block/include/intelblocks/meminit.h b/src/soc/intel/common/block/include/intelblocks/meminit.h
index 6276a7e294..3ebf5368a1 100644
--- a/src/soc/intel/common/block/include/intelblocks/meminit.h
+++ b/src/soc/intel/common/block/include/intelblocks/meminit.h
@@ -136,13 +136,11 @@ struct mem_channel_data {
* the mainboard.
* spd_info : Information about the memory topology.
* half_populated: Hint from mainboard if channels are half populated.
- * dimms_changed: True if the dimms is changed after caching the spd data.
*/
void mem_populate_channel_data(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cfg,
const struct mem_spd *spd_info,
bool half_populated,
- struct mem_channel_data *data,
- bool *dimms_changed);
+ struct mem_channel_data *data);
/*
* Given a channel number and the maximum number of supported channels, this
diff --git a/src/soc/intel/common/block/memory/meminit.c b/src/soc/intel/common/block/memory/meminit.c
index 272e6a1503..1c6563abc6 100644
--- a/src/soc/intel/common/block/memory/meminit.c
+++ b/src/soc/intel/common/block/memory/meminit.c
@@ -98,7 +98,7 @@ static void read_spd_md(const struct soc_mem_cfg *soc_mem_cfg, const struct mem_
static bool read_spd_dimm(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cfg,
const struct mem_spd *info, bool half_populated,
struct mem_channel_data *channel_data,
- size_t *spd_len, bool *dimms_changed)
+ size_t *spd_len)
{
size_t ch, dimm;
struct spd_block blk = { 0 };
@@ -110,7 +110,6 @@ static bool read_spd_dimm(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cf
* channel is marked as populated.
*/
uint32_t pop_mask = 0;
- *dimms_changed = false;
if (!(info->topo & MEM_TOPO_DIMM_MODULE))
return false;
@@ -134,14 +133,15 @@ static bool read_spd_dimm(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cf
printk(BIOS_WARNING, "Invalid SPD cache\n");
} else {
dimm_changed = check_if_dimm_changed(spd_cache, &blk);
- if (dimm_changed) {
+ if (dimm_changed && memupd->FspmArchUpd.NvsBufferPtr != 0) {
/*
- * Set flag to indicate that the
+ * Set FSP-M Arch UPD to indicate that the
* mrc_cache need to be invalidated
*/
- printk(BIOS_INFO,
- "DIMM change, invalidate cache.\n");
- *dimms_changed = true;
+ printk(BIOS_INFO, "DIMM change, invalidate cache.\n");
+ memupd->FspmArchUpd.NvsBufferPtr = 0;
+ memupd->FspmArchUpd.BootMode =
+ FSP_BOOT_WITH_FULL_CONFIGURATION;
}
}
need_update_cache = true;
@@ -187,8 +187,7 @@ static bool read_spd_dimm(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cf
void mem_populate_channel_data(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cfg,
const struct mem_spd *spd_info,
bool half_populated,
- struct mem_channel_data *data,
- bool *dimms_changed)
+ struct mem_channel_data *data)
{
size_t spd_md_len = 0, spd_dimm_len = 0;
bool have_dimms;
@@ -197,7 +196,7 @@ void mem_populate_channel_data(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_m
read_spd_md(soc_mem_cfg, spd_info, half_populated, data, &spd_md_len);
have_dimms = read_spd_dimm(memupd, soc_mem_cfg, spd_info, half_populated, data,
- &spd_dimm_len, dimms_changed);
+ &spd_dimm_len);
if (data->ch_population_flags == NO_CHANNEL_POPULATED)
die("No channels are populated. Incorrect memory configuration!\n");
diff --git a/src/soc/intel/tigerlake/meminit.c b/src/soc/intel/tigerlake/meminit.c
index 10c57a5532..368e071407 100644
--- a/src/soc/intel/tigerlake/meminit.c
+++ b/src/soc/intel/tigerlake/meminit.c
@@ -151,14 +151,13 @@ void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg,
const struct mem_spd *spd_info, bool half_populated)
{
struct mem_channel_data data;
- bool dimms_changed = false;
FSP_M_CONFIG *mem_cfg = &memupd->FspmConfig;
if (mb_cfg->type >= ARRAY_SIZE(soc_mem_cfg))
die("Invalid memory type(%x)!\n", mb_cfg->type);
mem_populate_channel_data(memupd, &soc_mem_cfg[mb_cfg->type], spd_info, half_populated,
- &data, &dimms_changed);
+ &data);
mem_init_spd_upds(mem_cfg, &data);
mem_init_dq_upds(mem_cfg, &data, mb_cfg);
mem_init_dqs_upds(mem_cfg, &data, mb_cfg);