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authorPatrick Rudolph <patrick.rudolph@9elements.com>2024-03-14 08:32:13 +0100
committerPatrick Rudolph <patrick.rudolph@9elements.com>2024-03-19 10:19:22 +0000
commit43d260745a13dfefb2b03a6edbe9c109ab7ad2ee (patch)
tree90b506a55104011b6e7da70a8073e507391b91de /src
parent49fe84e2c2f83fb2b31900c6bcafb2631aeb46de (diff)
soc/intel/xeon_sp: Drop uncore_fill_ssdt
Let ACPI DSDT figure out by itself if a stack is enabled. Allows to drop uncore_fill_ssdt() on all platforms. TEST=intel/archercity CRB Change-Id: Ib9051d608147f2de228509ff6b13871ca3183979 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81273 Reviewed-by: Shuo Liu <shuo.liu@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/xeon_sp/cpx/soc_acpi.c4
-rw-r--r--src/soc/intel/xeon_sp/include/soc/acpi.h1
-rw-r--r--src/soc/intel/xeon_sp/skx/soc_acpi.c4
-rw-r--r--src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl16
-rw-r--r--src/soc/intel/xeon_sp/spr/acpi/iiostack.asl2
-rw-r--r--src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl14
-rw-r--r--src/soc/intel/xeon_sp/spr/soc_acpi.c64
-rw-r--r--src/soc/intel/xeon_sp/uncore.c3
8 files changed, 25 insertions, 83 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/soc_acpi.c b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
index b2d6d79412..1434fbfce5 100644
--- a/src/soc/intel/xeon_sp/cpx/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
@@ -41,10 +41,6 @@ void soc_fill_fadt(acpi_fadt_t *fadt)
fadt->flags &= ~(ACPI_FADT_SEALED_CASE | ACPI_FADT_S4_RTC_WAKE);
}
-void uncore_fill_ssdt(const struct device *device)
-{
-}
-
/* TODO: See if we can use the common generate_p_state_entries */
void soc_power_states_generation(int core, int cores_per_package)
{
diff --git a/src/soc/intel/xeon_sp/include/soc/acpi.h b/src/soc/intel/xeon_sp/include/soc/acpi.h
index afccfe4a53..882c22638e 100644
--- a/src/soc/intel/xeon_sp/include/soc/acpi.h
+++ b/src/soc/intel/xeon_sp/include/soc/acpi.h
@@ -23,7 +23,6 @@ typedef struct {
unsigned long northbridge_write_acpi_tables(const struct device *device,
unsigned long current, struct acpi_rsdp *rsdp);
-void uncore_fill_ssdt(const struct device *device);
unsigned long xeonsp_acpi_create_madt_lapics(unsigned long current);
unsigned long acpi_fill_cedt(unsigned long current);
unsigned long acpi_fill_hmat(unsigned long current);
diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c
index b98e9989a6..30e14d31de 100644
--- a/src/soc/intel/xeon_sp/skx/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c
@@ -54,10 +54,6 @@ void soc_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_io(fadt);
}
-void uncore_fill_ssdt(const struct device *device)
-{
-}
-
void soc_power_states_generation(int core, int cores_per_package)
{
}
diff --git a/src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl b/src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl
index 80b3da2bc9..553ca9d8f7 100644
--- a/src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl
+++ b/src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl
@@ -17,10 +17,20 @@ Device (IIO_DEVICE_NAME(DEVPREFIX, SOCKET, STACK))
EisaId ("PNP0A03") /* PCI Bus */
})
Name (_UID, IIO_DEVICE_UID(DEVPREFIX, SOCKET, STACK))
- External (\_SB.IIO_DEVICE_NAME(STPREFIX, SOCKET, STACK))
- Method (_STA, 0, NotSerialized) // _STA: Status
+ Method (_STA, 0, NotSerialized)
{
- Return (\_SB.IIO_DEVICE_NAME(STPREFIX, SOCKET, STACK))
+ /*
+ * _CRS is being generated by SSDT for available stacks only and
+ * when missing the stack isn't available.
+ */
+ If (CondRefOf (_CRS))
+ {
+ Return (0xf)
+ }
+ Else
+ {
+ Return (0)
+ }
}
Method (_PRT, 0, NotSerialized)
{
diff --git a/src/soc/intel/xeon_sp/spr/acpi/iiostack.asl b/src/soc/intel/xeon_sp/spr/acpi/iiostack.asl
index 552f4c028a..5c3d7ead52 100644
--- a/src/soc/intel/xeon_sp/spr/acpi/iiostack.asl
+++ b/src/soc/intel/xeon_sp/spr/acpi/iiostack.asl
@@ -3,8 +3,6 @@
/* ***** PCI Stacks **** */
#undef DEVPREFIX
#define DEVPREFIX PC
-#undef STPREFIX
-#define STPREFIX ST
#undef PRTID
#define PRTID AR00
diff --git a/src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl b/src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl
index c65b699d6d..fdb599ec47 100644
--- a/src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl
+++ b/src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl
@@ -13,10 +13,20 @@ Device (IIO_DEVICE_NAME(DEVPREFIX, SOCKET, STACK))
Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */)
Name (_CID, EisaId ("PNP0A03") /* PCI Bus */)
Name (_UID, IIO_DEVICE_UID(DEVPREFIX, SOCKET, STACK))
- External (\_SB.IIO_DEVICE_NAME(STPREFIX, SOCKET, STACK))
Method (_STA, 0, NotSerialized)
{
- Return (\_SB.IIO_DEVICE_NAME(STPREFIX, SOCKET, STACK))
+ /*
+ * _CRS is being generated by SSDT for available stacks only and
+ * when missing the stack isn't available.
+ */
+ If (CondRefOf (_CRS))
+ {
+ Return (0xf)
+ }
+ Else
+ {
+ Return (0)
+ }
}
Method (_PRT, 0, NotSerialized)
{
diff --git a/src/soc/intel/xeon_sp/spr/soc_acpi.c b/src/soc/intel/xeon_sp/spr/soc_acpi.c
index 0b6e491fc0..607ee6c36d 100644
--- a/src/soc/intel/xeon_sp/spr/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/spr/soc_acpi.c
@@ -53,70 +53,6 @@ void soc_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_io(fadt);
}
-/*
- * Add a DSDT ACPI Name field for STACK enable setting.
- * This is retrieved by the device _STA defined in iiostack.asl
- */
-static void create_dsdt_stack_sta(uint8_t socket, uint8_t stack, bool stack_enabled)
-{
- char stack_sta[16];
- snprintf(stack_sta, sizeof(stack_sta), "ST%d%X", socket, stack);
-
- if (!stack_enabled)
- acpigen_write_name_integer(stack_sta, ACPI_STATUS_DEVICE_ALL_OFF);
- else
- acpigen_write_name_integer(stack_sta, ACPI_STATUS_DEVICE_ALL_ON);
-}
-
-void uncore_fill_ssdt(const struct device *device)
-{
- bool stack_enabled;
-
- /* Only add RTxx entries once. */
- if (device->upstream->secondary != 0)
- return;
-
- /*
- Write stack scope - this needs to match RP ACPI scopes.
- Stacks 0 (TYPE_UBOX_IIO)
- Scope: PC<socket><stack>, ResourceTemplate: P0RS
- Stacks 1 .. 5 (TYPE_UBOX_IIO)
- Scope: PC<socket><stack> & CX<socket><stack>, ResourceTemplate: RBRS
- Stacks 8 .. B (TYPE_DINO)
- Scope: DI<socket><stack> for DINO, ResourceTemplate: RBRS
- Scope: CP<socket><stack> for CPM (i.e., QAT), ResourceTemplate: RBRS
- Scope: HQ<socket><stack> for HQM (i.e., DLB), ResourceTemplate: RBRS
- Stacks D .. E (TYPE_UBOX)
- Scope: UC<socket><0..1> for UBOX[1-2], ResourceTemplate: UNRS
- */
-
- printk(BIOS_DEBUG, "%s device: %s\n", __func__, dev_path(device));
-
- /* The _CSR generation must match SPR iiostack.asl. */
- const IIO_UDS *hob = get_iio_uds();
- /* Iterate over CONFIG_MAX_SOCKET to keep ASL templates and DSDT injection in sync */
- for (uint8_t socket = 0; socket < CONFIG_MAX_SOCKET; ++socket) {
- for (int stack = 0; stack < MAX_LOGIC_IIO_STACK; ++stack) {
- const STACK_RES *ri =
- &hob->PlatformData.IIO_resource[socket].StackRes[stack];
-
- stack_enabled = soc_cpu_is_enabled(socket) &&
- ri->Personality < TYPE_RESERVED;
-
- printk(BIOS_DEBUG, "%s processing socket: %d, stack: %d, type: %d\n",
- __func__, socket, stack, ri->Personality);
-
- if (stack <= IioStack5) { // TYPE_UBOX_IIO
- create_dsdt_stack_sta(socket, stack, stack_enabled);
- } else if (stack >= IioStack8 && stack <= IioStack11) { // TYPE_DINO
- create_dsdt_stack_sta(socket, stack, stack_enabled);
- } else if (stack == IioStack13) { // TYPE_UBOX
- create_dsdt_stack_sta(socket, stack, stack_enabled);
- }
- }
- }
-}
-
/* TODO: See if we can use the common generate_p_state_entries */
void soc_power_states_generation(int core, int cores_per_package)
{
diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c
index 952ca4db70..0eaff0626f 100644
--- a/src/soc/intel/xeon_sp/uncore.c
+++ b/src/soc/intel/xeon_sp/uncore.c
@@ -369,9 +369,6 @@ static struct device_operations mmapvtd_ops = {
.enable_resources = pci_dev_enable_resources,
.init = mmapvtd_init,
.ops_pci = &soc_pci_ops,
-#if CONFIG(HAVE_ACPI_TABLES)
- .acpi_fill_ssdt = uncore_fill_ssdt,
-#endif
};
static const unsigned short mmapvtd_ids[] = {