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authorFelix Held <felix-coreboot@felixheld.de>2022-02-02 19:27:41 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-03 23:44:00 +0000
commit42d8cbf4d28fb13169a413c16507495f18fb9bab (patch)
treefdf1d5525691eed55599d5c714ea660e02cadb2f /src
parent429971a5fb8fbfd08223f55adb8df6ff13471930 (diff)
soc/amd/*/i2c: drop unused mainboard_i2c_override
No mainboard in the current tree implements mainboard_i2c_override. In a follow-up commit the i2c_pad_control struct is introduced to be able to make more parameters controllable by devicetree settings in the future. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8f9ed5d50d26e4623dc5888cc8af090fdd00fc03 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61566 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/cezanne/i2c.c4
-rw-r--r--src/soc/amd/cezanne/include/soc/southbridge.h3
-rw-r--r--src/soc/amd/picasso/i2c.c3
-rw-r--r--src/soc/amd/picasso/include/soc/southbridge.h3
-rw-r--r--src/soc/amd/sabrina/i2c.c4
-rw-r--r--src/soc/amd/sabrina/include/soc/southbridge.h3
6 files changed, 0 insertions, 20 deletions
diff --git a/src/soc/amd/cezanne/i2c.c b/src/soc/amd/cezanne/i2c.c
index 008b26190b..153fa7cd6d 100644
--- a/src/soc/amd/cezanne/i2c.c
+++ b/src/soc/amd/cezanne/i2c.c
@@ -33,8 +33,6 @@ void i2c_set_bar(unsigned int bus, uintptr_t bar)
}
#endif
-__weak void mainboard_i2c_override(int bus, uint32_t *pad_settings) { }
-
void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
{
const struct soc_amd_cezanne_config *config = config_of_soc();
@@ -57,8 +55,6 @@ void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
pad_ctrl |= cfg->speed == I2C_SPEED_STANDARD ?
I2C_PAD_CTRL_FALLSLEW_STD : I2C_PAD_CTRL_FALLSLEW_LOW;
pad_ctrl |= I2C_PAD_CTRL_FALLSLEW_EN;
-
- mainboard_i2c_override(bus, &pad_ctrl);
misc_write32(misc_reg, pad_ctrl);
}
diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h
index 4f372adf94..113395e954 100644
--- a/src/soc/amd/cezanne/include/soc/southbridge.h
+++ b/src/soc/amd/cezanne/include/soc/southbridge.h
@@ -147,7 +147,4 @@ void fch_final(void *chip_info);
void enable_aoac_devices(void);
void wait_for_aoac_enabled(unsigned int dev);
-/* Allow the board to change the default I2C pad configuration */
-void mainboard_i2c_override(int bus, uint32_t *pad_settings);
-
#endif /* AMD_CEZANNE_SOUTHBRIDGE_H */
diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c
index 18660f640b..925a8324ea 100644
--- a/src/soc/amd/picasso/i2c.c
+++ b/src/soc/amd/picasso/i2c.c
@@ -38,8 +38,6 @@ void i2c_set_bar(unsigned int bus, uintptr_t bar)
}
#endif
-__weak void mainboard_i2c_override(int bus, uint32_t *pad_settings) { }
-
void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
{
uint32_t pad_ctrl;
@@ -59,7 +57,6 @@ void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
I2C_PAD_CTRL_FALLSLEW_STD : I2C_PAD_CTRL_FALLSLEW_LOW;
pad_ctrl |= I2C_PAD_CTRL_FALLSLEW_EN;
- mainboard_i2c_override(bus, &pad_ctrl);
misc_write32(misc_reg, pad_ctrl);
}
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index 2936600abf..d439e92a21 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -136,7 +136,4 @@ void fch_final(void *chip_info);
void enable_aoac_devices(void);
void wait_for_aoac_enabled(unsigned int dev);
-/* Allow the board to change the default I2C pad configuration */
-void mainboard_i2c_override(int bus, uint32_t *pad_settings);
-
#endif /* AMD_PICASSO_SOUTHBRIDGE_H */
diff --git a/src/soc/amd/sabrina/i2c.c b/src/soc/amd/sabrina/i2c.c
index 2030f40016..f3eaf4ee66 100644
--- a/src/soc/amd/sabrina/i2c.c
+++ b/src/soc/amd/sabrina/i2c.c
@@ -35,8 +35,6 @@ void i2c_set_bar(unsigned int bus, uintptr_t bar)
}
#endif
-__weak void mainboard_i2c_override(int bus, uint32_t *pad_settings) { }
-
void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
{
const struct soc_amd_sabrina_config *config = config_of_soc();
@@ -59,8 +57,6 @@ void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
pad_ctrl |= cfg->speed == I2C_SPEED_STANDARD ?
I2C_PAD_CTRL_FALLSLEW_STD : I2C_PAD_CTRL_FALLSLEW_LOW;
pad_ctrl |= I2C_PAD_CTRL_FALLSLEW_EN;
-
- mainboard_i2c_override(bus, &pad_ctrl);
misc_write32(misc_reg, pad_ctrl);
}
diff --git a/src/soc/amd/sabrina/include/soc/southbridge.h b/src/soc/amd/sabrina/include/soc/southbridge.h
index 4b25c5eda6..7b5644b7b2 100644
--- a/src/soc/amd/sabrina/include/soc/southbridge.h
+++ b/src/soc/amd/sabrina/include/soc/southbridge.h
@@ -151,7 +151,4 @@ void fch_final(void *chip_info);
void enable_aoac_devices(void);
void wait_for_aoac_enabled(unsigned int dev);
-/* Allow the board to change the default I2C pad configuration */
-void mainboard_i2c_override(int bus, uint32_t *pad_settings);
-
#endif /* AMD_SABRINA_SOUTHBRIDGE_H */