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authorLean Sheng Tan <sheng.tan@9elements.com>2023-03-13 14:56:31 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2023-03-15 14:44:02 +0000
commit41546a524091165d04f0a91bba431f3245877bf2 (patch)
tree43e657f93f7487f7afabe07d3e1d162e5a1ad1f5 /src
parent4c5b3f1ce7b03d3fd20cb471b43d45752cb14060 (diff)
soc/intel/elkhartlake: Select `X86_CLFLUSH_CAR` config
This patch selects `X86_CLFLUSH_CAR` config for running `clflush` to invalidate the cache region based on commit 3134a81 for boot performance improvement. Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com> Change-Id: I8f8a0bfeaea508d3b4ad1b3fe2e68742cbab5570 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73687 Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/elkhartlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 8980bcc27d..f233ed90c9 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -68,6 +68,7 @@ config CPU_SPECIFIC_OPTIONS
select UDK_202005_BINDING
select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
select SOC_INTEL_RAPL_DISABLE_VIA_MCHBAR
+ select X86_CLFLUSH_CAR
config MAX_CPUS
int