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authorElyes Haouas <ehaouas@noos.fr>2022-11-22 11:07:11 +0100
committerMartin L Roth <gaumless@gmail.com>2022-11-24 06:05:08 +0000
commit36d81dfbdb341bd3b85da2cb802e4c68a2ca4cae (patch)
tree56e0de6018701fe7e4851e6c46a7688587ea8236 /src
parent9f0e21a4dae864809e9651403ab5bad48e784bee (diff)
sb/intel/i82801gx: Move SPIBASE and SPIBARxx to i82801gx.h
Also remove unused DEBUG_PERIODIC_SMIS macro. Change-Id: Ieb8487c7757b89a09c1cee4a83f94b9077dac87e Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69899 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.h7
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c4
2 files changed, 5 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index cf76a4029b..0625db08d4 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -9,10 +9,13 @@
#include <southbridge/intel/common/rcba.h> /* IWYU pragma: export */
-#ifndef __ACPI__
-#define DEBUG_PERIODIC_SMIS 0
+#define SPIBASE 0x3020
+#define SPIBAR16(x) RCBA16(SPIBASE + x)
+#define SPIBAR32(x) RCBA32(SPIBASE + x)
+#ifndef __ACPI__
#include <device/device.h>
+
void i82801gx_enable(struct device *dev);
void i82801gx_lpc_setup(void);
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 37095e8478..62ff757014 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -285,7 +285,6 @@ static void i82801gx_set_acpi_mode(struct device *dev)
}
}
-#define SPIBASE 0x3020
static void i82801gx_spi_init(void)
{
u16 spicontrol;
@@ -418,9 +417,6 @@ static void i82801gx_lpc_read_resources(struct device *dev)
}
}
-#define SPIBAR16(x) RCBA16(0x3020 + x)
-#define SPIBAR32(x) RCBA32(0x3020 + x)
-
static void lpc_final(struct device *dev)
{
u16 tco1_cnt;