diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-01-15 11:59:10 -0600 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-15 05:06:53 +0200 |
commit | 3549462a95c5d7b9450924a1c0ca54b992c81211 (patch) | |
tree | 86c7f2f134105f3d6560ef284ff55f4341d9e40a /src | |
parent | 469b5205c31eeb7f58e66aaec58ef824f2e090a5 (diff) |
baytrail: enable graphics turbo
Though the limited documentation indicates the default is
0 for the gfx_turbo_disable bit, in practice that isn't
true. Knock down the gfs_turbo_disable bit to enable
graphics turbo mode.
BUG=chrome-os-partner:25044
BRANCH=baytrail
TEST=Built and booted. Added debug code to output SB_BIOS_CONFIG.
Noted that bit 7 was set to 0.
Change-Id: I11210c6a0b29765cb709a54d6ebd94211538807b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182640
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/5050
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/baytrail/gfx.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index 6f78daca36..4ed08c93a3 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -212,6 +212,10 @@ static const struct reg_script gfx_init_script[] = { REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x9404, 0), REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x9408, 0), REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x940c, 0), + + /* Enable Gfx Turbo. */ + REG_IOSF_RMW(IOSF_PORT_PMC, SB_BIOS_CONFIG, + ~SB_BIOS_CONFIG_GFX_TURBO_DIS, 0), REG_SCRIPT_END }; |