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authorStanley Wu <stanley1.wu@lcfc.corp-partner.google.com>2022-12-15 17:41:13 +0800
committerMartin L Roth <gaumless@gmail.com>2022-12-17 20:24:44 +0000
commit3228b266b2c6da6cd274c0905a960bd4300fc567 (patch)
treeaefc656dc3f9796676e7903d758b70bc3dc42ac0 /src
parente56a812a6ad91d4109dc380258c787c85a7b082a (diff)
mb/google/nissa/var/pujjo: Tunning RegProxCtrl0 register for SX9324
Update SX9324 RegProxCtrl0 register settings based on tunning value from P-sensor vendor. BUG=b:242662878 TEST=i2cdump -y -f 13 0x28 on Pujjo Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Change-Id: If471a6fee5a3daeac1958709415b2d5e1329b81b Reviewed-on: https://review.coreboot.org/c/coreboot/+/70824 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/pujjo/overridetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/pujjo/overridetree.cb b/src/mainboard/google/brya/variants/pujjo/overridetree.cb
index ade32f0ad3..3997a815c8 100644
--- a/src/mainboard/google/brya/variants/pujjo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/pujjo/overridetree.cb
@@ -410,7 +410,7 @@ chip soc/intel/alderlake
register "reg_afe_ph1" = "0x1b"
register "reg_afe_ph2" = "0x1f"
register "reg_afe_ph3" = "0x3d"
- register "reg_prox_ctrl0" = "0x0a"
+ register "reg_prox_ctrl0" = "0x0b"
register "reg_prox_ctrl1" = "0x0a"
register "reg_prox_ctrl2" = "0x90"
register "reg_prox_ctrl3" = "0x60"
@@ -447,7 +447,7 @@ chip soc/intel/alderlake
register "ph01_resolution" = "1024"
register "ph23_resolution" = "1024"
register "startup_sensor" = "1"
- register "ph01_proxraw_strength" = "2"
+ register "ph01_proxraw_strength" = "3"
register "ph23_proxraw_strength" = "2"
register "avg_pos_strength" = "256"
register "cs_idle_sleep" = ""hi-z""