diff options
author | Keith Hui <buurin@gmail.com> | 2017-09-23 01:40:33 -0400 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-26 19:54:03 +0000 |
commit | 30c0ebe01563d6745e2221ba58d19d84158b8455 (patch) | |
tree | daafff695f97a0df018ce059c6009042c8b3dee8 /src | |
parent | efd395c6f766891f81ecac89bf6843267460ea96 (diff) |
asus/p2b-d[s]: Move to EARLY_CBMEM_INIT
Boot tested on p2b-ds. Migrate p2b-d as well because they share
the same mainboard romstage.
Change-Id: I3e4b98cc6191d557325fc5da97744902996673af
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/21646
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/asus/p2b-d/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/asus/p2b-ds/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/asus/p2b-ds/romstage.c | 2 |
3 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/asus/p2b-d/Kconfig b/src/mainboard/asus/p2b-d/Kconfig index 8bee3e11e4..ba2e7e0057 100644 --- a/src/mainboard/asus/p2b-d/Kconfig +++ b/src/mainboard/asus/p2b-d/Kconfig @@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX - select LATE_CBMEM_INIT select SOUTHBRIDGE_INTEL_I82371EB select SUPERIO_WINBOND_W83977TF select HAVE_PIRQ_TABLE diff --git a/src/mainboard/asus/p2b-ds/Kconfig b/src/mainboard/asus/p2b-ds/Kconfig index 405edca49d..7d69d1f156 100644 --- a/src/mainboard/asus/p2b-ds/Kconfig +++ b/src/mainboard/asus/p2b-ds/Kconfig @@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX - select LATE_CBMEM_INIT select SOUTHBRIDGE_INTEL_I82371EB select SUPERIO_WINBOND_W83977TF select HAVE_PIRQ_TABLE diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/romstage.c index 1d34bd9cd0..1aa5955113 100644 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ b/src/mainboard/asus/p2b-ds/romstage.c @@ -24,6 +24,7 @@ #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h> #include <lib.h> +#include <cbmem.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) @@ -40,4 +41,5 @@ void mainboard_romstage_entry(unsigned long bist) enable_smbus(); sdram_initialize(); + cbmem_initialize_empty(); } |