diff options
| author | Ashish Kumar Mishra <ashish.k.mishra@intel.com> | 2024-04-24 16:49:18 +0530 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2024-05-06 09:47:56 +0000 |
| commit | 2de0e8762225265fcf5b72b9d2b9b291f57af50c (patch) | |
| tree | ff24b2f884e5f648d5fd0786e27ceb7a8f9dcb14 /src | |
| parent | 7da138dd10e558bcdf1ce2bacd081191d6ec7cce (diff) | |
block/fast_spi: Use read32p/write32p for SPI RW
The current fast_spi code uses memcpy for rw. The SPI flash read/write
has 4 byte limit, due to which the current 64 bit memcpy doesn't work.
Hence update rw ops to use read32p/write32p.
BUG=b:242829490
TEST=Verified MRC cache working on MTL 64-bit, future 64 bit platforms
and RPL(brox/skolas) 32-bit platforms.
Change-Id: I317c7160bf192dd2aeacebf6029a809bc97f3420
Signed-off-by: Ashish Kumar Mishra <ashish.k.mishra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82079
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi_flash.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c index e9cfc230a4..a7762711fa 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c @@ -75,18 +75,28 @@ static uint32_t fast_spi_flash_read_sfdp(struct fast_spi_flash_ctx *ctx, /* Fill FDATAn FIFO in preparation for a write transaction. */ static void fill_xfer_fifo(struct fast_spi_flash_ctx *ctx, const void *data, - size_t len) + size_t len) { - /* YES! memcpy() works. FDATAn does not require 32-bit accesses. */ - memcpy((void *)(ctx->mmio_base + SPIBAR_FDATA(0)), data, len); + const uint32_t *data32 = (const uint32_t *)data; + for (size_t i = 0; i < len / sizeof(uint32_t); i++) + write32p(ctx->mmio_base + SPIBAR_FDATA(i), *data32++); + + const uint8_t *data8 = (const uint8_t *)data32; + for (size_t i = 0; i < len % sizeof(uint32_t); i++) + write8p(ctx->mmio_base + SPIBAR_FDATA(len / sizeof(uint32_t)) + i, *data8++); } /* Drain FDATAn FIFO after a read transaction populates data. */ -static void drain_xfer_fifo(struct fast_spi_flash_ctx *ctx, void *dest, +static void drain_xfer_fifo(struct fast_spi_flash_ctx *ctx, void *data, size_t len) { - /* YES! memcpy() works. FDATAn does not require 32-bit accesses. */ - memcpy(dest, (void *)(ctx->mmio_base + SPIBAR_FDATA(0)), len); + uint32_t *data32 = (uint32_t *)data; + for (size_t i = 0; i < len / sizeof(uint32_t); i++) + *data32++ = read32p(ctx->mmio_base + SPIBAR_FDATA(i)); + + uint8_t *data8 = (uint8_t *)data32; + for (size_t i = 0; i < len % sizeof(uint32_t); i++) + *data8++ = read8p(ctx->mmio_base + SPIBAR_FDATA(len / sizeof(uint32_t)) + i); } /* Fire up a transfer using the hardware sequencer. */ |