Drop W83627THF, it's the same device as W83627THG.

The only difference is that the "G" version is in a Pb-free package, which
is not relevant from a programmer's view.

We keep W83627THG (and drop W83627THF) because:

 - The W83627THF had a CIR device / LDN which doesn't actually exist.

 - The W83627THF had no GPIO2, GPIO3 LDNs (were commented out).

 - The W83627THF didn't use the PNP_MSC0/1 which is needed/used by boards.

This also fixes an issue on MSI MS7135's devicetree.cb:

  device pnp 4e.6 off end           # XXX keep allocator happy

The line above can be (and is) removed, as it was only needed due to the
incorrect CIR LDN in the W83627THF.

In the iwill/dk8x target: Drop incorrect LDNs 4 and 6, add 0xb.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

15 files changed, 16 insertions, 286 deletions

diff --git a/src/mainboard/iwill/dk8x/Kconfig b/src/mainboard/iwill/dk8x/Kconfig
index 209cc563c5..16eab8dbee 100644
--- a/src/mainboard/iwill/dk8x/Kconfig
+++ b/src/mainboard/iwill/dk8x/Kconfig
@@ -8,7 +8,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
 	select SOUTHBRIDGE_AMD_AMD8111
 	select SOUTHBRIDGE_AMD_AMD8131
-	select SUPERIO_WINBOND_W83627THF
+	select SUPERIO_WINBOND_W83627THG
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
diff --git a/src/mainboard/iwill/dk8x/devicetree.cb b/src/mainboard/iwill/dk8x/devicetree.cb
index 58646f307c..3888805476 100644
--- a/src/mainboard/iwill/dk8x/devicetree.cb
+++ b/src/mainboard/iwill/dk8x/devicetree.cb
@@ -25,18 +25,18 @@ chip northbridge/amd/amdk8/root_complex
 						device pci 1.0 off end
 					end
 					device pci 1.0 on
-						chip superio/winbond/w83627thf
+						# TODO: This is incomplete.
+						chip superio/winbond/w83627thg
 							device pnp 2e.0 on end
 							device pnp 2e.1 on end
 							device pnp 2e.2 on end
 							device pnp 2e.3 on end
-							device pnp 2e.4 on end
 							device pnp 2e.5 on end
-							device pnp 2e.6 on end
 							device pnp 2e.7 on end
 							device pnp 2e.8 on end
 							device pnp 2e.9 on end
 							device pnp 2e.a on end
+							device pnp 2e.b on end
 						end
 					end
 					device pci 1.1 on end
diff --git a/src/mainboard/lanner/em8510/Kconfig b/src/mainboard/lanner/em8510/Kconfig
index b4d03f78eb..2ffdb842ea 100644
--- a/src/mainboard/lanner/em8510/Kconfig
+++ b/src/mainboard/lanner/em8510/Kconfig
@@ -6,7 +6,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select CPU_INTEL_SOCKET_MPGA479M
 	select NORTHBRIDGE_INTEL_I855
 	select SOUTHBRIDGE_INTEL_I82801DX
-	select SUPERIO_WINBOND_W83627THF
+	select SUPERIO_WINBOND_W83627THG
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
 	select HAVE_HARD_RESET
diff --git a/src/mainboard/lanner/em8510/devicetree.cb b/src/mainboard/lanner/em8510/devicetree.cb
index 7df1443066..5784a16981 100644
--- a/src/mainboard/lanner/em8510/devicetree.cb
+++ b/src/mainboard/lanner/em8510/devicetree.cb
@@ -13,7 +13,7 @@ chip northbridge/intel/i855
 			register "enable_usb" = "0"
 			register "enable_native_ide" = "0"
 			device pci 1f.0 on
-				chip superio/winbond/w83627thf # link 1
+				chip superio/winbond/w83627thg # link 1
                 		        device pnp 2e.0 on      #  Floppy
                 	        	        io 0x60 = 0x3f0
                 	                	irq 0x70 = 6
@@ -37,7 +37,6 @@ chip northbridge/intel/i855
                 		                irq 0x70 = 1
 						irq 0x72 = 12
 					end
-                		        device pnp 2e.6 off end #  CIR
                 		        device pnp 2e.7 off end #  GAME_MIDI_GIPO1
                 	 	        device pnp 2e.8 off end #  GPIO2
                 	 	        device pnp 2e.9 off end #  GPIO3
diff --git a/src/mainboard/lanner/em8510/romstage.c b/src/mainboard/lanner/em8510/romstage.c
index 6d79e0b3e5..fe4fd69327 100644
--- a/src/mainboard/lanner/em8510/romstage.c
+++ b/src/mainboard/lanner/em8510/romstage.c
@@ -34,11 +34,11 @@
 #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
 #include "northbridge/intel/i855/raminit.h"
 #include "northbridge/intel/i855/debug.c"
-#include "superio/winbond/w83627thf/w83627thf_early_serial.c"
+#include "superio/winbond/w83627thg/w83627thg_early_serial.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 
-#define SERIAL_DEV PNP_DEV(0x2e, W83627THF_SP1)
+#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
 
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
@@ -65,7 +65,7 @@ void main(unsigned long bist)
 #endif
 	}
 
-        w83627thf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+        w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
 
diff --git a/src/mainboard/msi/ms7135/Kconfig b/src/mainboard/msi/ms7135/Kconfig
index 2de546b730..d8581f731c 100644
--- a/src/mainboard/msi/ms7135/Kconfig
+++ b/src/mainboard/msi/ms7135/Kconfig
@@ -7,7 +7,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select NORTHBRIDGE_AMD_AMDK8
 	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
 	select SOUTHBRIDGE_NVIDIA_CK804
-	select SUPERIO_WINBOND_W83627THF
+	select SUPERIO_WINBOND_W83627THG
 	select HAVE_BUS_CONFIG
 	select HAVE_HARD_RESET
 	select HAVE_OPTION_TABLE
diff --git a/src/mainboard/msi/ms7135/devicetree.cb b/src/mainboard/msi/ms7135/devicetree.cb
index e796b94650..14c6bad1d3 100644
--- a/src/mainboard/msi/ms7135/devicetree.cb
+++ b/src/mainboard/msi/ms7135/devicetree.cb
@@ -11,7 +11,7 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
         chip southbridge/nvidia/ck804		# Southbridge
           device pci 0.0 on end			# HT
           device pci 1.0 on			# LPC
-            chip superio/winbond/w83627thf	# Super I/O
+            chip superio/winbond/w83627thg	# Super I/O
               device pnp 4e.0 on		# Floppy
                 io 0x60 = 0x3f0
                 irq 0x70 = 6
@@ -30,14 +30,13 @@ chip northbridge/amd/amdk8/root_complex		# Root complex
                 io 0x60 = 0x2f8
                 irq 0x70 = 3
               end
-              device pnp 4e.5 on		# PS/2 keyboard
+              device pnp 4e.5 on		# PS/2 keyboard & mouse
                 io 0x60 = 0x60
                 io 0x62 = 0x64
                 irq 0x70 = 1
                 irq 0x72 = 12
               end
-              device pnp 4e.6 off end		# XXX keep allocator happy
-              device pnp 4e.7 off end		# Game, MIDI, GPIO 1, GPIO 5
+              device pnp 4e.7 off end		# Game port, MIDI, GPIO 1 & 5
               device pnp 4e.8 off end		# GPIO 2
               device pnp 4e.9 off end		# GPIO 3, GPIO 4
               device pnp 4e.a off end		# ACPI
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index a4b9cb6567..f6dbb0ae6d 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -22,7 +22,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define SERIAL_DEV PNP_DEV(0x4e, W83627THF_SP1)
+#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1)
 
 #if CONFIG_LOGICAL_CPUS == 1
 #define SET_NB_CFG_54 1
@@ -38,7 +38,7 @@
 #include <pc80/mc146818rtc.h>
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
-#include "superio/winbond/w83627thf/w83627thf_early_serial.c"
+#include "superio/winbond/w83627thg/w83627thg_early_serial.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include <console/console.h>
@@ -123,7 +123,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		bsp_apicid = init_cpus(cpu_init_detectedx);
 	}
 
-	w83627thf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+	w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	uart_init();
 	console_init();
 
diff --git a/src/superio/winbond/Kconfig b/src/superio/winbond/Kconfig
index 63168cfa29..cbe78b14ff 100644
--- a/src/superio/winbond/Kconfig
+++ b/src/superio/winbond/Kconfig
@@ -4,8 +4,6 @@ config SUPERIO_WINBOND_W83627EHG
 	bool
 config SUPERIO_WINBOND_W83627HF
 	bool
-config SUPERIO_WINBOND_W83627THF
-	bool
 config SUPERIO_WINBOND_W83627THG
 	bool
 config SUPERIO_WINBOND_W83627UHG
diff --git a/src/superio/winbond/Makefile.inc b/src/superio/winbond/Makefile.inc
index e8dbad998b..cad1cd535a 100644
--- a/src/superio/winbond/Makefile.inc
+++ b/src/superio/winbond/Makefile.inc
@@ -1,7 +1,6 @@
 subdirs-y += w83627dhg
 subdirs-y += w83627ehg
 subdirs-y += w83627hf
-subdirs-y += w83627thf
 subdirs-y += w83627thg
 subdirs-y += w83627uhg
 subdirs-y += w83697hf
diff --git a/src/superio/winbond/w83627thf/Makefile.inc b/src/superio/winbond/w83627thf/Makefile.inc
deleted file mode 100644
index 4b40bb056a..0000000000
--- a/src/superio/winbond/w83627thf/Makefile.inc
+++ /dev/null
@@ -1,24 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2000 AG Electronics Ltd.
-## Copyright (C) 2003-2004 Linux Networx
-## Copyright (C) 2004 Tyan By LYH change from PC87360
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-##
-
-ramstage-$(CONFIG_SUPERIO_WINBOND_W83627THF) += superio.c
-
diff --git a/src/superio/winbond/w83627thf/chip.h b/src/superio/winbond/w83627thf/chip.h
deleted file mode 100644
index a70b6f2633..0000000000
--- a/src/superio/winbond/w83627thf/chip.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_WINBOND_W83627THF_CHIP_H
-#define SUPERIO_WINBOND_W83627THF_CHIP_H
-
-#include <pc80/keyboard.h>
-#include <uart8250.h>
-
-extern struct chip_operations superio_winbond_w83627thf_ops;
-
-struct superio_winbond_w83627thf_config {
-	struct uart8250 com1, com2;
-	struct pc_keyboard keyboard;
-};
-
-#endif
diff --git a/src/superio/winbond/w83627thf/superio.c b/src/superio/winbond/w83627thf/superio.c
deleted file mode 100644
index 602ed1b7e5..0000000000
--- a/src/superio/winbond/w83627thf/superio.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <arch/io.h>
-#include <device/device.h>
-#include <device/pnp.h>
-#include <console/console.h>
-#include <string.h>
-#include <bitops.h>
-#include <uart8250.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "chip.h"
-#include "w83627thf.h"
-
-static void w83627thf_enter_ext_func_mode(device_t dev)
-{
-	outb(0x87, dev->path.pnp.port);
-	outb(0x87, dev->path.pnp.port);
-}
-
-static void w83627thf_exit_ext_func_mode(device_t dev)
-{
-	outb(0xaa, dev->path.pnp.port);
-}
-
-static void w83627thf_init(device_t dev)
-{
-	struct superio_winbond_w83627thf_config *conf = dev->chip_info;
-	struct resource *res0;
-
-	if (!dev->enabled)
-		return;
-
-	switch(dev->path.pnp.device) {
-	case W83627THF_SP1:
-		res0 = find_resource(dev, PNP_IDX_IO0);
-		init_uart8250(res0->base, &conf->com1);
-		break;
-	case W83627THF_SP2:
-		res0 = find_resource(dev, PNP_IDX_IO0);
-		init_uart8250(res0->base, &conf->com2);
-		break;
-	case W83627THF_KBC:
-		pc_keyboard_init(&conf->keyboard);
-		break;
-	}
-}
-
-static void w83627thf_set_resources(device_t dev)
-{
-	w83627thf_enter_ext_func_mode(dev);
-	pnp_set_resources(dev);
-	w83627thf_exit_ext_func_mode(dev);
-}
-
-static void w83627thf_enable_resources(device_t dev)
-{
-	w83627thf_enter_ext_func_mode(dev);
-	pnp_enable_resources(dev);
-	w83627thf_exit_ext_func_mode(dev);
-}
-
-static void w83627thf_enable(device_t dev)
-{
-	w83627thf_enter_ext_func_mode(dev);
-	pnp_enable(dev);
-	w83627thf_exit_ext_func_mode(dev);
-}
-
-static struct device_operations ops = {
-	.read_resources   = pnp_read_resources,
-	.set_resources    = w83627thf_set_resources,
-	.enable_resources = w83627thf_enable_resources,
-	.enable           = w83627thf_enable,
-	.init             = w83627thf_init,
-};
-
-static struct pnp_info pnp_dev_info[] = {
-	{ &ops, W83627THF_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
-	{ &ops, W83627THF_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
-	{ &ops, W83627THF_SP1,  PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
-	{ &ops, W83627THF_SP2,  PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
-	{ &ops, W83627THF_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
-	{ &ops, W83627THF_CIR,  PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
-	{ &ops, W83627THF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07ff, 0}, {0x07fe, 4}, },
-	/* { W83627THF_GPIO2, }, */
-	/* { W83627THF_GPIO3, }, */
-	{ &ops, W83627THF_ACPI, PNP_IRQ0, },
-	{ &ops, W83627THF_HWM,  PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
-};
-
-static void enable_dev(device_t dev)
-{
-	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_winbond_w83627thf_ops = {
-	CHIP_NAME("Winbond W83627THF Super I/O")
-	.enable_dev = enable_dev,
-};
diff --git a/src/superio/winbond/w83627thf/w83627thf.h b/src/superio/winbond/w83627thf/w83627thf.h
deleted file mode 100644
index baff178ba6..0000000000
--- a/src/superio/winbond/w83627thf/w83627thf.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_WINBOND_W83627THF_W83627THF_H
-#define SUPERIO_WINBOND_W83627THF_W83627THF_H
-
-#define W83627THF_FDC              0   /* Floppy */
-#define W83627THF_PP               1   /* Parallel port */
-#define W83627THF_SP1              2   /* Com1 */
-#define W83627THF_SP2              3   /* Com2 */
-#define W83627THF_KBC              5   /* PS/2 keyboard & mouse */
-#define W83627THF_CIR              6
-#define W83627THF_GAME_MIDI_GPIO1  7
-#define W83627THF_GPIO2            8
-#define W83627THF_GPIO3            9
-#define W83627THF_ACPI            10
-#define W83627THF_HWM             11   /* Hardware monitor */
-
-#endif
diff --git a/src/superio/winbond/w83627thf/w83627thf_early_serial.c b/src/superio/winbond/w83627thf/w83627thf_early_serial.c
deleted file mode 100644
index 93f09efaa8..0000000000
--- a/src/superio/winbond/w83627thf/w83627thf_early_serial.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <arch/romcc_io.h>
-#include "w83627thf.h"
-
-static void pnp_enter_ext_func_mode(device_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0x87, port);
-	outb(0x87, port);
-}
-
-static void pnp_exit_ext_func_mode(device_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0xaa, port);
-}
-
-static void w83627thf_enable_serial(device_t dev, u16 iobase)
-{
-	pnp_enter_ext_func_mode(dev);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
-	pnp_set_enable(dev, 1);
-	pnp_exit_ext_func_mode(dev);
-}