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authorJakub Czapiga <jacz@semihalf.com>2023-06-01 12:31:10 +0000
committerSubrata Banik <subratabanik@google.com>2023-06-14 08:13:05 +0000
commit2af14fee5278ac27b09b2ff104782ca0a79ee152 (patch)
tree293fb460b444e9bfe6073a9d8ee8922941c452b2 /src
parent4fe0b40e1b5d4602fdcea89ddbf2c90e91b39451 (diff)
mb/google/rex/variants/ovis: Add basic DTT
Add default Intel DPTF. BUG=b:274421383 TEST=util/abuild/abuild -p none -t google/rex -x -a -b ovis Change-Id: Ib023f6d6d184f6935a6a454250755502a46b707f Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75580 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/rex/variants/ovis/overridetree.cb5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/ovis/overridetree.cb b/src/mainboard/google/rex/variants/ovis/overridetree.cb
index 889ae0ed0b..bb138334cb 100644
--- a/src/mainboard/google/rex/variants/ovis/overridetree.cb
+++ b/src/mainboard/google/rex/variants/ovis/overridetree.cb
@@ -42,6 +42,11 @@ chip soc/intel/meteorlake
}"
device domain 0 on
+ device ref dtt on
+ chip drivers/intel/dptf
+ device generic 0 alias dptf_policy on end
+ end
+ end
device ref pcie_rp11 on
# Enable SSD Card PCIE 11 using clk 7
register "pcie_rp[PCH_RP(11)]" = "{