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authorTim Wawrzynczak <twawrzynczak@chromium.org>2021-08-05 09:37:52 -0600
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-08-09 15:03:36 +0000
commit29f3a88d9ff1e54a0f2e04c430ee4c639e97d65f (patch)
treecf14777dac56c25d9eb1c602c5748ae2237f81f9 /src
parent04c71deceb7ebb5ab89a43a2f9c3e495d5f0aaf3 (diff)
drivers/uart/acpi: Update _S0W return value to D3hot
In order to support wake from D3cold, most devices require extra circuitry and possibly out-of-band communications to the host. Therefore, assume that most UARTs that do have wake capabilities support wake from D3hot rather than D3cold. BUG=b:187228954 TEST=compile Change-Id: I24d6d0e81d980fc9c910d8f47f557c88990b6400 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56834 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/drivers/uart/acpi/acpi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/uart/acpi/acpi.c b/src/drivers/uart/acpi/acpi.c
index d4b14aac04..3081182042 100644
--- a/src/drivers/uart/acpi/acpi.c
+++ b/src/drivers/uart/acpi/acpi.c
@@ -89,7 +89,7 @@ static void uart_acpi_fill_ssdt(const struct device *dev)
/* Wake capabilities */
if (config->wake) {
- acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_COLD);
+ acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_HOT);
acpigen_write_PRW(config->wake, SLP_TYP_S3);
};