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authorFelix Held <felix-coreboot@felixheld.de>2024-08-24 00:45:03 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-08-27 11:35:10 +0000
commit2710492d224afb65de8f53f437b17a248b170388 (patch)
tree64ec18db793b99a8c1f2d2784dafc41b3823379b /src
parent5e7ab1a23346684eb06057bb38d3baae4946a537 (diff)
soc/amd/common/psp: consistently use uint[8,16,32,64]_t data types
Use the uint[8,16,32,64]_t data types everywhere instead of a mixture of uint[8,16,32,64]_t and u[8,16,32,64] data types for consistency. Suggested-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I36151ecf94619afaf690dbb73834fcff3c51fdac Reviewed-on: https://review.coreboot.org/c/coreboot/+/84067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/common/block/include/amdblocks/psp.h2
-rw-r--r--src/soc/amd/common/block/psp/psb.c10
-rw-r--r--src/soc/amd/common/block/psp/psp.c2
-rw-r--r--src/soc/amd/common/block/psp/psp_def.h8
-rw-r--r--src/soc/amd/common/block/psp/psp_gen1.c16
-rw-r--r--src/soc/amd/common/block/psp/psp_gen2.c22
-rw-r--r--src/soc/amd/common/block/psp/psp_smi.c26
-rw-r--r--src/soc/amd/common/block/psp/psp_smi_flash.c42
-rw-r--r--src/soc/amd/common/block/psp/psp_smi_flash.h39
-rw-r--r--src/soc/amd/common/block/psp/psp_smi_flash_gen1.c15
-rw-r--r--src/soc/amd/common/block/psp/psp_smi_flash_gen2.c17
-rw-r--r--src/soc/amd/common/block/psp/psp_smm.c8
12 files changed, 105 insertions, 102 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h
index 061e79def5..1ab3385314 100644
--- a/src/soc/amd/common/block/include/amdblocks/psp.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp.h
@@ -77,7 +77,7 @@ enum psp_blob_type {
* Notify PSP that the system is entering a sleep state. sleep_state uses the
* same definition as Pm1Cnt[SlpTyp], typically 0, 1, 3, 4, 5.
*/
-void psp_notify_sx_info(u8 sleep_type);
+void psp_notify_sx_info(uint8_t sleep_type);
int psp_load_named_blob(enum psp_blob_type type, const char *name);
diff --git a/src/soc/amd/common/block/psp/psb.c b/src/soc/amd/common/block/psp/psb.c
index 4ac7aaf08c..d6054734ff 100644
--- a/src/soc/amd/common/block/psp/psb.c
+++ b/src/soc/amd/common/block/psp/psb.c
@@ -34,7 +34,7 @@
#define FUSE_STATUS_FUSING_ERR 0x0a
#define FUSE_STATUS_BOOT_DONE 0x0b
-static const char *psb_test_status_to_string(u32 status)
+static const char *psb_test_status_to_string(uint32_t status)
{
switch (status) {
case PSB_TEST_STATUS_PASS:
@@ -66,7 +66,7 @@ static const char *psb_test_status_to_string(u32 status)
}
}
-static const char *fuse_status_to_string(u32 status)
+static const char *fuse_status_to_string(uint32_t status)
{
switch (status) {
case FUSE_STATUS_SUCCESS:
@@ -101,7 +101,7 @@ static enum cb_err get_psb_status(uint32_t *psb_status_value)
*/
static enum cb_err psb_enable(void)
{
- u32 status;
+ uint32_t status;
struct mbox_default_buffer buffer = {
.header = {
.size = sizeof(buffer)
@@ -127,7 +127,7 @@ static enum cb_err psb_enable(void)
printk(BIOS_INFO, "PSB: HSTI = %x\n", status);
- const u32 psb_test_status = status & PSB_TEST_STATUS_MASK;
+ const uint32_t psb_test_status = status & PSB_TEST_STATUS_MASK;
if (psb_test_status != PSB_TEST_STATUS_PASS) {
printk(BIOS_ERR, "PSB: %s\n", psb_test_status_to_string(psb_test_status));
@@ -150,7 +150,7 @@ static enum cb_err psb_enable(void)
return CB_ERR;
}
- const u32 fuse_status = read32(&buffer.header.status);
+ const uint32_t fuse_status = read32(&buffer.header.status);
if (fuse_status != FUSE_STATUS_SUCCESS) {
printk(BIOS_ERR, "PSB: %s\n", fuse_status_to_string(fuse_status));
return CB_ERR;
diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c
index a8bb20535e..008052b729 100644
--- a/src/soc/amd/common/block/psp/psp.c
+++ b/src/soc/amd/common/block/psp/psp.c
@@ -35,7 +35,7 @@ static const char *status_to_string(int err)
}
}
-static u32 rd_resp_sts(struct mbox_buffer_header *header)
+static uint32_t rd_resp_sts(struct mbox_buffer_header *header)
{
return read32(&header->status);
}
diff --git a/src/soc/amd/common/block/psp/psp_def.h b/src/soc/amd/common/block/psp/psp_def.h
index 3cf2fc9f4b..e723c84772 100644
--- a/src/soc/amd/common/block/psp/psp_def.h
+++ b/src/soc/amd/common/block/psp/psp_def.h
@@ -45,8 +45,8 @@
* AMD reference code aligns and pads all buffers to 32 bytes.
*/
struct mbox_buffer_header {
- u32 size; /* total size of buffer */
- u32 status; /* command status, filled by PSP if applicable */
+ uint32_t size; /* total size of buffer */
+ uint32_t status; /* command status, filled by PSP if applicable */
} __packed;
/*
@@ -83,7 +83,7 @@ struct mbox_cmd_smm_info_buffer {
/* MBOX_BIOS_CMD_SX_INFO */
struct mbox_cmd_sx_info_buffer {
struct mbox_buffer_header header;
- u8 sleep_type;
+ uint8_t sleep_type;
} __packed __aligned(32);
/* MBOX_BIOS_CMD_PSP_FTPM_QUERY, MBOX_BIOS_CMD_PSP_CAPS_QUERY */
@@ -144,7 +144,7 @@ uintptr_t get_psp_mmio_base(void);
void psp_print_cmd_status(int cmd_status, struct mbox_buffer_header *header);
/* This command needs to be implemented by the generation specific code. */
-int send_psp_command(u32 command, void *buffer);
+int send_psp_command(uint32_t command, void *buffer);
enum cb_err psp_get_ftpm_capabilties(uint32_t *capabilities);
enum cb_err psp_get_psp_capabilities(uint32_t *capabilities);
diff --git a/src/soc/amd/common/block/psp/psp_gen1.c b/src/soc/amd/common/block/psp/psp_gen1.c
index 1227c2abab..b3815f9283 100644
--- a/src/soc/amd/common/block/psp/psp_gen1.c
+++ b/src/soc/amd/common/block/psp/psp_gen1.c
@@ -32,9 +32,9 @@
* cmd_response: pointer to command/response buffer
*/
struct pspv1_mbox {
- u32 mbox_command;
- u32 mbox_status;
- u64 cmd_response; /* definition conflicts w/BKDG but matches agesa */
+ uint32_t mbox_command;
+ uint32_t mbox_status;
+ uint64_t cmd_response; /* definition conflicts w/BKDG but matches agesa */
} __packed;
static void *soc_get_mbox_address(void)
@@ -64,17 +64,17 @@ static void *soc_get_mbox_address(void)
return (void *)(psp_mmio + PSP_MAILBOX_OFFSET);
}
-static u32 rd_mbox_sts(struct pspv1_mbox *mbox)
+static uint32_t rd_mbox_sts(struct pspv1_mbox *mbox)
{
return read32(&mbox->mbox_status);
}
-static void wr_mbox_cmd(struct pspv1_mbox *mbox, u32 cmd)
+static void wr_mbox_cmd(struct pspv1_mbox *mbox, uint32_t cmd)
{
write32(&mbox->mbox_command, cmd);
}
-static u32 rd_mbox_cmd(struct pspv1_mbox *mbox)
+static uint32_t rd_mbox_cmd(struct pspv1_mbox *mbox)
{
return read32(&mbox->mbox_command);
}
@@ -112,7 +112,7 @@ static int wait_command(struct pspv1_mbox *mbox)
return -PSPSTS_CMD_TIMEOUT;
}
-int send_psp_command(u32 command, void *buffer)
+int send_psp_command(uint32_t command, void *buffer)
{
struct pspv1_mbox *mbox = soc_get_mbox_address();
if (!mbox)
@@ -153,7 +153,7 @@ int send_psp_command(u32 command, void *buffer)
int psp_load_named_blob(enum psp_blob_type type, const char *name)
{
int cmd_status;
- u32 command;
+ uint32_t command;
void *blob;
switch (type) {
diff --git a/src/soc/amd/common/block/psp/psp_gen2.c b/src/soc/amd/common/block/psp/psp_gen2.c
index a587cda38a..2113b5725b 100644
--- a/src/soc/amd/common/block/psp/psp_gen2.c
+++ b/src/soc/amd/common/block/psp/psp_gen2.c
@@ -82,17 +82,17 @@ uintptr_t get_psp_mmio_base(void)
}
union pspv2_mbox_command {
- u32 val;
+ uint32_t val;
struct pspv2_mbox_cmd_fields {
- u16 mbox_status;
- u8 mbox_command;
- u32 reserved:6;
- u32 recovery:1;
- u32 ready:1;
+ uint16_t mbox_status;
+ uint8_t mbox_command;
+ uint32_t reserved:6;
+ uint32_t recovery:1;
+ uint32_t ready:1;
} __packed fields;
};
-static u16 rd_mbox_sts(uintptr_t psp_mmio)
+static uint16_t rd_mbox_sts(uintptr_t psp_mmio)
{
union pspv2_mbox_command tmp;
@@ -100,7 +100,7 @@ static u16 rd_mbox_sts(uintptr_t psp_mmio)
return tmp.fields.mbox_status;
}
-static void wr_mbox_cmd(uintptr_t psp_mmio, u8 cmd)
+static void wr_mbox_cmd(uintptr_t psp_mmio, uint8_t cmd)
{
union pspv2_mbox_command tmp = { .val = 0 };
@@ -109,7 +109,7 @@ static void wr_mbox_cmd(uintptr_t psp_mmio, u8 cmd)
write32p(psp_mmio | PSP_MAILBOX_COMMAND_OFFSET, tmp.val);
}
-static u8 rd_mbox_recovery(uintptr_t psp_mmio)
+static uint8_t rd_mbox_recovery(uintptr_t psp_mmio)
{
union pspv2_mbox_command tmp;
@@ -127,7 +127,7 @@ static int wait_command(uintptr_t psp_mmio, bool wait_for_ready)
union pspv2_mbox_command and_mask = { .val = ~0 };
union pspv2_mbox_command expected = { .val = 0 };
struct stopwatch sw;
- u32 tmp;
+ uint32_t tmp;
/* Zero fields from and_mask that should be kept */
and_mask.fields.mbox_command = 0;
@@ -149,7 +149,7 @@ static int wait_command(uintptr_t psp_mmio, bool wait_for_ready)
return -PSPSTS_CMD_TIMEOUT;
}
-int send_psp_command(u32 command, void *buffer)
+int send_psp_command(uint32_t command, void *buffer)
{
const uintptr_t psp_mmio = get_psp_mmio_base();
if (!psp_mmio)
diff --git a/src/soc/amd/common/block/psp/psp_smi.c b/src/soc/amd/common/block/psp/psp_smi.c
index 66e84d13a6..be7d4cb8bb 100644
--- a/src/soc/amd/common/block/psp/psp_smi.c
+++ b/src/soc/amd/common/block/psp/psp_smi.c
@@ -15,7 +15,7 @@
#define MBOX_PSP_CMD_SPI_ERASE 0x86
extern struct {
- u8 buffer[P2C_BUFFER_MAXSIZE];
+ uint8_t buffer[P2C_BUFFER_MAXSIZE];
} __aligned(32) p2c_buffer;
static const uintptr_t p2c_mbox_base = (uintptr_t)&p2c_buffer.buffer;
@@ -26,15 +26,15 @@ static const uintptr_t p2c_mbox_base = (uintptr_t)&p2c_buffer.buffer;
union p2c_mbox_status {
struct {
- u32 checksum : 8; /* [ 0.. 7] */
- u32 checksum_en : 1; /* [ 8.. 8] */
- u32 reserved : 22; /* [ 9..30] */
- u32 command_ready : 1; /* [31..31] */
+ uint32_t checksum : 8; /* [ 0.. 7] */
+ uint32_t checksum_en : 1; /* [ 8.. 8] */
+ uint32_t reserved : 22; /* [ 9..30] */
+ uint32_t command_ready : 1; /* [31..31] */
} __packed fields;
- u32 raw;
+ uint32_t raw;
};
-static u8 rd_bios_mbox_checksum(void)
+static uint8_t rd_bios_mbox_checksum(void)
{
union p2c_mbox_status status;
@@ -42,7 +42,7 @@ static u8 rd_bios_mbox_checksum(void)
return status.fields.checksum;
}
-static void wr_bios_mbox_checksum(u8 checksum)
+static void wr_bios_mbox_checksum(uint8_t checksum)
{
union p2c_mbox_status status;
@@ -83,7 +83,7 @@ static void clear_psp_command(void)
write32p(p2c_mbox_base + P2C_MBOX_COMMAND_OFFSET, 0);
}
-static u32 get_psp_command(void)
+static uint32_t get_psp_command(void)
{
return read32p(p2c_mbox_base + P2C_MBOX_COMMAND_OFFSET);
}
@@ -98,11 +98,11 @@ static uint32_t get_psp_cmd_buffer_length(void)
return read32(&get_psp_command_buffer()->header.size);
}
-static u8 calc_psp_buffer_checksum8(void)
+static uint8_t calc_psp_buffer_checksum8(void)
{
- const uint8_t *data = (const u8 *)get_psp_command_buffer();
+ const uint8_t *data = (const uint8_t *)get_psp_command_buffer();
const size_t size = get_psp_cmd_buffer_length();
- u8 checksum = 0;
+ uint8_t checksum = 0;
size_t i;
for (i = 0; i < size; i++)
@@ -131,7 +131,7 @@ static enum mbox_p2c_status check_psp_command(void)
static void handle_psp_command(void)
{
enum mbox_p2c_status status;
- u32 cmd;
+ uint32_t cmd;
struct mbox_default_buffer *const buffer = get_psp_command_buffer();
status = check_psp_command();
diff --git a/src/soc/amd/common/block/psp/psp_smi_flash.c b/src/soc/amd/common/block/psp/psp_smi_flash.c
index e9b906b0be..ab9bc6c7f2 100644
--- a/src/soc/amd/common/block/psp/psp_smi_flash.c
+++ b/src/soc/amd/common/block/psp/psp_smi_flash.c
@@ -12,16 +12,16 @@
#include "psp_smi_flash.h"
static bool is_valid_rw_byte_count(struct mbox_psp_cmd_spi_read_write *cmd_buf,
- u64 num_bytes)
+ uint64_t num_bytes)
{
- const u32 cmd_buf_size = read32(&cmd_buf->header.size);
+ const uint32_t cmd_buf_size = read32(&cmd_buf->header.size);
const size_t payload_buffer_offset =
offsetof(struct mbox_psp_cmd_spi_read_write, req) +
offsetof(struct psp_spi_read_write_request, buffer);
return num_bytes <= cmd_buf_size - payload_buffer_offset;
}
-static const char *id_to_region_name(u64 target_nv_id)
+static const char *id_to_region_name(uint64_t target_nv_id)
{
switch (target_nv_id) {
case SMI_TARGET_NVRAM:
@@ -36,7 +36,7 @@ static const char *id_to_region_name(u64 target_nv_id)
* Do not cache the location to cope with flash changing underneath (e.g. due
* to an update)
*/
-static int lookup_store(u64 target_nv_id, struct region_device *rstore)
+static int lookup_store(uint64_t target_nv_id, struct region_device *rstore)
{
/* read_rdev, write_rdev and store_irdev need to be static to not go out of scope when
this function returns */
@@ -66,7 +66,7 @@ static int lookup_store(u64 target_nv_id, struct region_device *rstore)
return rdev_chain(rstore, rdev, 0, region_device_sz(rdev));
}
-static enum mbox_p2c_status find_psp_spi_flash_device_region(u64 target_nv_id,
+static enum mbox_p2c_status find_psp_spi_flash_device_region(uint64_t target_nv_id,
struct region_device *store,
const struct spi_flash **flash)
{
@@ -95,9 +95,9 @@ enum mbox_p2c_status psp_smi_spi_get_info(struct mbox_default_buffer *buffer)
(struct mbox_psp_cmd_spi_info *)buffer;
const struct spi_flash *flash;
struct region_device store;
- u64 target_nv_id;
- u64 block_size;
- u64 num_blocks;
+ uint64_t target_nv_id;
+ uint64_t block_size;
+ uint64_t num_blocks;
enum mbox_p2c_status ret;
printk(BIOS_SPEW, "PSP: SPI info request\n");
@@ -134,11 +134,11 @@ enum mbox_p2c_status psp_smi_spi_read(struct mbox_default_buffer *buffer)
struct mbox_psp_cmd_spi_read_write *const cmd_buf =
(struct mbox_psp_cmd_spi_read_write *)buffer;
enum mbox_p2c_status ret;
- u64 target_nv_id;
- u64 lba;
- u64 offset;
- u64 num_bytes;
- u8 *data;
+ uint64_t target_nv_id;
+ uint64_t lba;
+ uint64_t offset;
+ uint64_t num_bytes;
+ uint8_t *data;
size_t addr;
const struct spi_flash *flash;
struct region_device store;
@@ -183,11 +183,11 @@ enum mbox_p2c_status psp_smi_spi_write(struct mbox_default_buffer *buffer)
struct mbox_psp_cmd_spi_read_write *const cmd_buf =
(struct mbox_psp_cmd_spi_read_write *)buffer;
enum mbox_p2c_status ret;
- u64 target_nv_id;
- u64 lba;
- u64 offset;
- u64 num_bytes;
- u8 *data;
+ uint64_t target_nv_id;
+ uint64_t lba;
+ uint64_t offset;
+ uint64_t num_bytes;
+ uint8_t *data;
size_t addr;
const struct spi_flash *flash;
struct region_device store;
@@ -232,9 +232,9 @@ enum mbox_p2c_status psp_smi_spi_erase(struct mbox_default_buffer *buffer)
struct mbox_psp_cmd_spi_erase *const cmd_buf =
(struct mbox_psp_cmd_spi_erase *)buffer;
enum mbox_p2c_status ret;
- u64 target_nv_id;
- u64 lba;
- u64 num_blocks;
+ uint64_t target_nv_id;
+ uint64_t lba;
+ uint64_t num_blocks;
size_t addr;
size_t num_bytes;
const struct spi_flash *flash;
diff --git a/src/soc/amd/common/block/psp/psp_smi_flash.h b/src/soc/amd/common/block/psp/psp_smi_flash.h
index 52144f8c95..6f3eb97af0 100644
--- a/src/soc/amd/common/block/psp/psp_smi_flash.h
+++ b/src/soc/amd/common/block/psp/psp_smi_flash.h
@@ -10,11 +10,11 @@ enum psp_spi_id_type {
struct psp_spi_info_request {
#if CONFIG(SOC_AMD_COMMON_BLOCK_PSP_GEN2)
- u64 target_nv_id;
+ uint64_t target_nv_id;
#endif
- u64 lba;
- u64 block_size;
- u64 num_blocks;
+ uint64_t lba;
+ uint64_t block_size;
+ uint64_t num_blocks;
} __packed;
struct mbox_psp_cmd_spi_info {
@@ -24,12 +24,12 @@ struct mbox_psp_cmd_spi_info {
struct psp_spi_read_write_request {
#if CONFIG(SOC_AMD_COMMON_BLOCK_PSP_GEN2)
- u64 target_nv_id;
+ uint64_t target_nv_id;
#endif
- u64 lba;
- u64 offset;
- u64 num_bytes;
- u8 buffer[];
+ uint64_t lba;
+ uint64_t offset;
+ uint64_t num_bytes;
+ uint8_t buffer[];
} __packed;
struct mbox_psp_cmd_spi_read_write {
@@ -39,10 +39,10 @@ struct mbox_psp_cmd_spi_read_write {
struct psp_spi_erase_request {
#if CONFIG(SOC_AMD_COMMON_BLOCK_PSP_GEN2)
- u64 target_nv_id;
+ uint64_t target_nv_id;
#endif
- u64 lba;
- u64 num_blocks;
+ uint64_t lba;
+ uint64_t num_blocks;
} __packed;
struct mbox_psp_cmd_spi_erase {
@@ -53,10 +53,11 @@ struct mbox_psp_cmd_spi_erase {
bool is_valid_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf);
bool is_valid_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf);
bool is_valid_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf);
-u64 get_psp_spi_info_id(struct mbox_psp_cmd_spi_info *cmd_buf);
-void set_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf, u64 lba, u64 block_size,
- u64 num_blocks);
-void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf, u64 *target_nv_id,
- u64 *lba, u64 *offset, u64 *num_bytes, u8 **data);
-void get_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf, u64 *target_nv_id, u64 *lba,
- u64 *num_blocks);
+uint64_t get_psp_spi_info_id(struct mbox_psp_cmd_spi_info *cmd_buf);
+void set_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf, uint64_t lba, uint64_t block_size,
+ uint64_t num_blocks);
+void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf,
+ uint64_t *target_nv_id, uint64_t *lba, uint64_t *offset,
+ uint64_t *num_bytes, uint8_t **data);
+void get_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf, uint64_t *target_nv_id,
+ uint64_t *lba, uint64_t *num_blocks);
diff --git a/src/soc/amd/common/block/psp/psp_smi_flash_gen1.c b/src/soc/amd/common/block/psp/psp_smi_flash_gen1.c
index c9beddbda7..5c087ec987 100644
--- a/src/soc/amd/common/block/psp/psp_smi_flash_gen1.c
+++ b/src/soc/amd/common/block/psp/psp_smi_flash_gen1.c
@@ -20,21 +20,22 @@ bool is_valid_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf)
return true;
}
-u64 get_psp_spi_info_id(struct mbox_psp_cmd_spi_info *cmd_buf)
+uint64_t get_psp_spi_info_id(struct mbox_psp_cmd_spi_info *cmd_buf)
{
return SMI_TARGET_NVRAM;
}
-void set_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf, u64 lba, u64 block_size,
- u64 num_blocks)
+void set_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf, uint64_t lba, uint64_t block_size,
+ uint64_t num_blocks)
{
write64(&cmd_buf->req.lba, lba);
write64(&cmd_buf->req.block_size, block_size);
write64(&cmd_buf->req.num_blocks, num_blocks);
}
-void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf, u64 *target_nv_id,
- u64 *lba, u64 *offset, u64 *num_bytes, u8 **data)
+void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf,
+ uint64_t *target_nv_id, uint64_t *lba, uint64_t *offset,
+ uint64_t *num_bytes, uint8_t **data)
{
*target_nv_id = SMI_TARGET_NVRAM;
*lba = read64(&cmd_buf->req.lba);
@@ -43,8 +44,8 @@ void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf, u64 *ta
*data = cmd_buf->req.buffer;
}
-void get_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf, u64 *target_nv_id, u64 *lba,
- u64 *num_blocks)
+void get_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf, uint64_t *target_nv_id,
+ uint64_t *lba, uint64_t *num_blocks)
{
*target_nv_id = SMI_TARGET_NVRAM;
*lba = read64(&cmd_buf->req.lba);
diff --git a/src/soc/amd/common/block/psp/psp_smi_flash_gen2.c b/src/soc/amd/common/block/psp/psp_smi_flash_gen2.c
index f62cdd23a4..70e4bc41db 100644
--- a/src/soc/amd/common/block/psp/psp_smi_flash_gen2.c
+++ b/src/soc/amd/common/block/psp/psp_smi_flash_gen2.c
@@ -5,7 +5,7 @@
#include "psp_def.h"
#include "psp_smi_flash.h"
-static bool is_valid_psp_spi_id(u64 target_nv_id)
+static bool is_valid_psp_spi_id(uint64_t target_nv_id)
{
return target_nv_id == SMI_TARGET_NVRAM ||
target_nv_id == SMI_TARGET_RPMC_NVRAM;
@@ -26,21 +26,22 @@ bool is_valid_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf)
return is_valid_psp_spi_id(read64(&cmd_buf->req.target_nv_id));
}
-u64 get_psp_spi_info_id(struct mbox_psp_cmd_spi_info *cmd_buf)
+uint64_t get_psp_spi_info_id(struct mbox_psp_cmd_spi_info *cmd_buf)
{
return read64(&cmd_buf->req.target_nv_id);
}
-void set_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf, u64 lba, u64 block_size,
- u64 num_blocks)
+void set_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf, uint64_t lba, uint64_t block_size,
+ uint64_t num_blocks)
{
write64(&cmd_buf->req.lba, lba);
write64(&cmd_buf->req.block_size, block_size);
write64(&cmd_buf->req.num_blocks, num_blocks);
}
-void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf, u64 *target_nv_id,
- u64 *lba, u64 *offset, u64 *num_bytes, u8 **data)
+void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf,
+ uint64_t *target_nv_id, uint64_t *lba, uint64_t *offset,
+ uint64_t *num_bytes, uint8_t **data)
{
*target_nv_id = read64(&cmd_buf->req.target_nv_id);
*lba = read64(&cmd_buf->req.lba);
@@ -49,8 +50,8 @@ void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf, u64 *ta
*data = cmd_buf->req.buffer;
}
-void get_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf, u64 *target_nv_id, u64 *lba,
- u64 *num_blocks)
+void get_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf, uint64_t *target_nv_id,
+ uint64_t *lba, uint64_t *num_blocks)
{
*target_nv_id = read64(&cmd_buf->req.target_nv_id);
*lba = read64(&cmd_buf->req.lba);
diff --git a/src/soc/amd/common/block/psp/psp_smm.c b/src/soc/amd/common/block/psp/psp_smm.c
index 00e00dd261..671942b0f8 100644
--- a/src/soc/amd/common/block/psp/psp_smm.c
+++ b/src/soc/amd/common/block/psp/psp_smm.c
@@ -18,7 +18,7 @@
* buffer.
*/
struct {
- u8 buffer[C2P_BUFFER_MAXSIZE];
+ uint8_t buffer[C2P_BUFFER_MAXSIZE];
} __aligned(32) c2p_buffer;
/*
@@ -26,7 +26,7 @@ struct {
* and then send an SMI to the host to process the request.
*/
struct {
- u8 buffer[P2C_BUFFER_MAXSIZE];
+ uint8_t buffer[P2C_BUFFER_MAXSIZE];
} __aligned(32) p2c_buffer;
/*
@@ -45,7 +45,7 @@ static void clear_smm_flag(void)
smm_flag = 0;
}
-static int send_psp_command_smm(u32 command, void *buffer)
+static int send_psp_command_smm(uint32_t command, void *buffer)
{
int cmd_status;
@@ -106,7 +106,7 @@ int psp_notify_smm(void)
}
/* Notify PSP the system is going to a sleep state. */
-void psp_notify_sx_info(u8 sleep_type)
+void psp_notify_sx_info(uint8_t sleep_type)
{
int cmd_status;
struct mbox_cmd_sx_info_buffer *buffer;