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authorSubrata Banik <subrata.banik@intel.com>2021-01-09 17:18:57 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-01-10 17:49:54 +0000
commit26e0f3f30b66fe89145fd811ed79fbc17ae42a31 (patch)
tree3d5f19b0a9ed6d8abbea5a12c99b0428d75860a2 /src
parent8c4aa15e91a6149f51d03463d025ec6bf614397d (diff)
mb/intel/adlrvp: Update GPIOs as per latest schematics
1. GPP_D8, GPP_H23 => Remove unused GPIOs 2. GPP_E18 .. GPP_E22 => Program the correct Native Functions for GPIO Change-Id: Iedb1f8fbf5f96a9617b72ba1a6419e3fd4e331b4 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49260 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/adlrvp/gpio.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c
index 1943a667d8..3131cc0c05 100644
--- a/src/mainboard/intel/adlrvp/gpio.c
+++ b/src/mainboard/intel/adlrvp/gpio.c
@@ -243,16 +243,16 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
- PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
+ PAD_NC(GPP_D8, NONE),
PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
/* DDP1/2/3/4/A/B/C CTRLCLK and CTRLDATA pins */
- PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
- PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
- PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
- PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
- PAD_CFG_NF(GPP_E22, NONE, DEEP, NF1),
+ PAD_CFG_NF(GPP_E18, NONE, DEEP, NF4),
+ PAD_CFG_NF(GPP_E19, NONE, DEEP, NF4),
+ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF4),
+ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF4),
+ PAD_CFG_NF(GPP_E22, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_A21, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_A22, NONE, DEEP, NF2),
@@ -265,7 +265,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_H20, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1),
- PAD_CFG_NF(GPP_H23, NONE, DEEP, NF1),
+ PAD_NC(GPP_H23, NONE),
/* A21 : HDMI CRLS CTRLCLK */
PAD_CFG_NF(GPP_A21, NONE, DEEP, NF1),