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authorChen-Tsung Hsieh <chentsung@chromium.org>2021-09-06 12:58:39 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-09-08 10:16:53 +0000
commit229e6bc95f177c78aa9a96e94708ba5d186186eb (patch)
treec455282cd7bfed555eb09d17c01c6f4597e97de1 /src
parentf88b90f6a9031ddf28c041628534efbfce01a39f (diff)
mb/google/cherry: Fix incorrect timestamps in eventlog
The eventlog requires RTC to provide correct timestamps, so we have to turn on the config and add the common drivers. BUG=b:199003609 TEST=check timestamp in 'mosys eventlog list' BRANCH=none Signed-off-by: Chen-Tsung Hsieh <chentsung@chromium.org> Change-Id: Ia382cd023fcbfdf2c1efeb7b32c0b99feb71effa Reviewed-on: https://review.coreboot.org/c/coreboot/+/57403 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/cherry/Kconfig1
-rw-r--r--src/soc/mediatek/mt8195/Makefile.inc2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/cherry/Kconfig b/src/mainboard/google/cherry/Kconfig
index 09d820c2b7..71572679f2 100644
--- a/src/mainboard/google/cherry/Kconfig
+++ b/src/mainboard/google/cherry/Kconfig
@@ -12,6 +12,7 @@ config VBOOT
config BOARD_SPECIFIC_OPTIONS
def_bool y
+ select RTC
select SOC_MEDIATEK_MT8195
select BOARD_ROMSIZE_KB_8192
select MAINBOARD_HAS_CHROMEOS
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc
index 3439001cba..d15d4760c2 100644
--- a/src/soc/mediatek/mt8195/Makefile.inc
+++ b/src/soc/mediatek/mt8195/Makefile.inc
@@ -67,6 +67,8 @@ ramstage-y += mt6360.c
ramstage-y += ../common/mtcmos.c mtcmos.c
ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c
ramstage-y += ../common/pll.c pll.c
+ramstage-y += ../common/pmif.c
+ramstage-y += ../common/rtc.c ../common/rtc_mt6359p.c
ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
ramstage-y += soc.c
ramstage-y += ../common/sspm.c