diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-27 14:39:29 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-28 15:14:35 +0000 |
| commit | 1d66ad1cbde133a83efd632dcecaaa4253699d85 (patch) | |
| tree | 535e253d754e70782608b12e700240c8f6b23681 /src | |
| parent | 0b03c08223d03515646787b9339c0c5104f020a5 (diff) | |
soc/amd/stoneyridge: move map_oprom_vendev to graphics.c
Move map_oprom_vendev to graphics.c to match the other AMD SoCs. Also
change the comment style to be more in line with the rest of coreboot
and drop the unneeded line break in the printk call.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Icc1f3d73fba973413c5a22e2f5ae01bc58bc3e76
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74041
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/graphics.c | 23 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/northbridge.c | 21 |
3 files changed, 24 insertions, 21 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index cef83beeeb..656fa2ee50 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -50,6 +50,7 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += fch.c ramstage-y += fch_agesa.c ramstage-y += gpio.c +ramstage-y += graphics.c ramstage-y += monotonic_timer.c ramstage-y += northbridge.c ramstage-y += sata.c diff --git a/src/soc/amd/stoneyridge/graphics.c b/src/soc/amd/stoneyridge/graphics.c new file mode 100644 index 0000000000..c0d4328c71 --- /dev/null +++ b/src/soc/amd/stoneyridge/graphics.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/pci_rom.h> +#include <stdint.h> + +/* Change the vendor / device IDs to match the generic VBIOS header. */ +u32 map_oprom_vendev(u32 vendev) +{ + u32 new_vendev; + + if ((vendev >= 0x100298e0) && (vendev <= 0x100298ef)) + new_vendev = 0x100298e0; + else if ((vendev >= 0x10029870) && (vendev <= 0x1002987f)) + new_vendev = 0x10029870; + else + new_vendev = vendev; + + if (vendev != new_vendev) + printk(BIOS_NOTICE, "Mapping PCI device %8x to %8x\n", vendev, new_vendev); + + return new_vendev; +} diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index e318024dd8..384698ac55 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -407,27 +407,6 @@ void domain_read_resources(struct device *dev) } } -/********************************************************************* - * Change the vendor / device IDs to match the generic VBIOS header. * - *********************************************************************/ -u32 map_oprom_vendev(u32 vendev) -{ - u32 new_vendev; - - if ((vendev >= 0x100298e0) && (vendev <= 0x100298ef)) - new_vendev = 0x100298e0; - else if ((vendev >= 0x10029870) && (vendev <= 0x1002987f)) - new_vendev = 0x10029870; - else - new_vendev = vendev; - - if (vendev != new_vendev) - printk(BIOS_NOTICE, "Mapping PCI device %8x to %8x\n", - vendev, new_vendev); - - return new_vendev; -} - __weak void set_board_env_params(GNB_ENV_CONFIGURATION *params) { } void SetNbEnvParams(GNB_ENV_CONFIGURATION *params) |