diff options
| author | Kevin Chiu <kevin.chiu.17802@gmail.com> | 2021-10-18 19:45:37 +0800 |
|---|---|---|
| committer | Raul Rangel <rrangel@chromium.org> | 2021-10-25 21:45:11 +0000 |
| commit | 1a950d6466473e0f5047cff33929c7da1b3f6787 (patch) | |
| tree | bcd785b9923da0d960024e66dcf5a8a9dd8d4934 /src | |
| parent | 5fa09cb17f4c99c5736c63f71f812dd6fe62e846 (diff) | |
mb/google/guybrush/var/nipperkin: override dxio to turn off WLAN ASPM L1.2/L1.2
turn off WLAN ASPM L1.1/L1.2 as a short-term w/a for WLAN AP probe failure.
BUG=b:198258604
BRANCH=guybrush
TEST=emerge-guybrush coreboot chromeos-bootimage
AP is able to be probed by wlan module
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Change-Id: Ic7be523626b0ff6e4b1c66ba6af13b15061ef4cb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58417
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
4 files changed, 29 insertions, 7 deletions
diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c index abb854e44c..cf8153412a 100644 --- a/src/mainboard/google/guybrush/port_descriptors.c +++ b/src/mainboard/google/guybrush/port_descriptors.c @@ -7,13 +7,6 @@ #include <soc/gpio.h> #include <types.h> -enum dxio_port_id { - WLAN, - SD, - WWAN_NVME, - NVME -}; - /* All PCIe Resets are handled in coreboot */ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = { { /* WLAN */ @@ -126,6 +119,10 @@ static const fsp_ddi_descriptor guybrush_czn_ddi_descriptors[] = { } }; +void __weak variant_update_dxio_descriptors(fsp_dxio_descriptor *dxio_descriptors) +{ +} + void mainboard_get_dxio_ddi_descriptors( const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) @@ -138,6 +135,8 @@ void mainboard_get_dxio_ddi_descriptors( if (variant_has_pcie_wwan()) guybrush_czn_dxio_descriptors[WWAN_NVME].gpio_group_id = GPIO_18; + variant_update_dxio_descriptors(guybrush_czn_dxio_descriptors); + *dxio_descs = guybrush_czn_dxio_descriptors; *dxio_num = ARRAY_SIZE(guybrush_czn_dxio_descriptors); diff --git a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h index aab905bad9..eabce1f4cd 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h @@ -5,6 +5,7 @@ #include <amdblocks/gpio.h> #include <soc/pci_devs.h> +#include <platform_descriptors.h> #define WLAN_DEVFN PCIE_GPP_2_0_DEVFN #define SD_DEVFN PCIE_GPP_2_1_DEVFN @@ -48,4 +49,13 @@ bool variant_has_fpmcu(void); bool variant_has_pcie_wwan(void); +void variant_update_dxio_descriptors(fsp_dxio_descriptor *dxio_descriptors); + +enum dxio_port_id { + WLAN, + SD, + WWAN_NVME, + NVME +}; + #endif /* __BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/guybrush/variants/nipperkin/Makefile.inc b/src/mainboard/google/guybrush/variants/nipperkin/Makefile.inc index f7c97bafbf..03c9c8bac4 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/Makefile.inc +++ b/src/mainboard/google/guybrush/variants/nipperkin/Makefile.inc @@ -3,5 +3,8 @@ bootblock-y += gpio.c romstage-y += gpio.c ramstage-y += gpio.c +bootblock-y += variant.c +romstage-y += variant.c +ramstage-y += variant.c subdirs-y += ./memory diff --git a/src/mainboard/google/guybrush/variants/nipperkin/variant.c b/src/mainboard/google/guybrush/variants/nipperkin/variant.c new file mode 100644 index 0000000000..3315fa0249 --- /dev/null +++ b/src/mainboard/google/guybrush/variants/nipperkin/variant.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <device/device.h> + +void variant_update_dxio_descriptors(fsp_dxio_descriptor *dxio_descriptors) +{ + dxio_descriptors[WLAN].link_aspm_L1_1 = false; + dxio_descriptors[WLAN].link_aspm_L1_2 = false; +} |