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authorElyes HAOUAS <ehaouas@noos.fr>2020-10-08 09:13:15 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2021-01-26 21:00:00 +0000
commit19a0923ca9911a8f5ceebec3e1a679b5be5577a0 (patch)
treeee899195dec164b2fe747097ae436aaf058ade7f /src
parent76eaab0fd973f2a776026575dec39c62445b2934 (diff)
mb/asus/f2a85-m: Convert to ASL 2.0 syntax
Generated 'build/dsdt.dsl' are identical. Change-Id: I3a5ef0987f2e03e07f1de2b3b10d65dde3827c70 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46158 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/asus/f2a85-m/acpi/sleep.asl14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/asus/f2a85-m/acpi/sleep.asl b/src/mainboard/asus/f2a85-m/acpi/sleep.asl
index e08accda50..07f6419b64 100644
--- a/src/mainboard/asus/f2a85-m/acpi/sleep.asl
+++ b/src/mainboard/asus/f2a85-m/acpi/sleep.asl
@@ -26,20 +26,20 @@ Method(\_PTS, 1) {
/* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
- Store (0x07, UPWS)
+ UPWS = 0x07
} /* End Method(\_PTS) */
/*