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authorJakub Czapiga <jacz@semihalf.com>2023-06-01 12:11:50 +0000
committerFelix Held <felix-coreboot@felixheld.de>2023-06-07 15:22:22 +0000
commit15aa0a56ce751f7c36402fe74b6bc3c636c26307 (patch)
treebc1fb925238df9aa58d18b877bfaf4333acc6652 /src
parent1a7d2038684415b7698822512aa4553a8b1d3bf7 (diff)
mb/google/rex/variants/ovis: Add SSD card config
BUG=b:274421383 TEST=util/abuild/abuild -p none -t google/rex -x -a -b ovis Change-Id: I3795313e784595ac02ee2a38f466bcb9e613a6a4 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75576 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Jan Dabros <dabros@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/rex/variants/ovis/overridetree.cb8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/ovis/overridetree.cb b/src/mainboard/google/rex/variants/ovis/overridetree.cb
index 2d43a0e122..bc10cd1a97 100644
--- a/src/mainboard/google/rex/variants/ovis/overridetree.cb
+++ b/src/mainboard/google/rex/variants/ovis/overridetree.cb
@@ -28,6 +28,14 @@ chip soc/intel/meteorlake
}"
device domain 0 on
+ device ref pcie_rp11 on
+ # Enable SSD Card PCIE 11 using clk 7
+ register "pcie_rp[PCH_RP(11)]" = "{
+ .clk_src = 7,
+ .clk_req = 7,
+ .flags = PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ end # PCIE11 SSD card
device ref i2c4 on
chip drivers/i2c/tpm
register "hid" = ""GOOG0005""