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authorWon Chung <wonchung@google.com>2022-05-23 22:57:55 +0000
committerMartin L Roth <gaumless@tutanota.com>2022-05-28 04:51:59 +0000
commit0d303393795e76281245309b68b49f8f459ce08e (patch)
tree3a5de59a63eab0fe476518a6edf6819aef214d82 /src
parent0d89e1589ccad3d92c76544bbe4033fe119ec2fc (diff)
mb/google/brya/var/{taeko, taeko4es}: Correct _PLD values
This patch is to denote the correct value of ACPI _PLD for USB ports. +----------------+ | | | Screen | | | +----------------+ C0 | | C1 A | MLB DB | A | | +----------------+ BUG=b:216490477 TEST=emerge-brya coreboot Signed-off-by: Won Chung <wonchung@google.com> Change-Id: Icd56c650a03c5db6e1e68e4ca4c9f0c068a7a430 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64616 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/taeko/overridetree.cb8
-rw-r--r--src/mainboard/google/brya/variants/taeko4es/overridetree.cb4
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb
index c212f1d1f1..cc055ba5ba 100644
--- a/src/mainboard/google/brya/variants/taeko/overridetree.cb
+++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb
@@ -590,7 +590,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A
probe DB_USB DB_USB3_1C_1A
@@ -613,7 +613,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port3 on
probe DB_USB DB_USB3_NO_A
probe DB_USB DB_USB3_1C_1A
@@ -629,7 +629,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-A Port (DB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
register "group" = "ACPI_PLD_GROUP(3, 1)"
device ref usb2_port7 on
probe DB_USB DB_USB3_1C_1A
@@ -660,7 +660,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-A Port (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port3 on
probe DB_USB DB_USB3_1C_1A
end
diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
index 0de40448c5..f1074de74d 100644
--- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
@@ -450,7 +450,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A
end
@@ -472,7 +472,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on
probe DB_USB DB_USB3_NO_A
end