diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-08-15 16:38:49 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-08-22 17:51:20 +0000 |
| commit | 069b6d0479aa64cbbc7367a157548edcb04651dc (patch) | |
| tree | ac2ce0c63a1e6f2d7eb7fb1f75df0b29547c4798 /src | |
| parent | 66cd18462c3599d584423661f36d4c35559e10a6 (diff) | |
soc/intel/alderlake: Perform TME core activation on all CPUs
This patch runs `set_tme_core_activate()` on all CPUs (BSP+APs) as
per Alder Lake Processor EDS.
TEST= Able to build and boot Google/Redrix.
Dumping MSR 0x9FF on all logical processors shows zero value being
set.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I130480d4fba413d47d0d0137932ec1fb041a88d8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66753
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/alderlake/cpu.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index f9e8f6f2fa..dce5478f80 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -140,6 +140,9 @@ void soc_core_init(struct device *cpu) set_energy_perf_pref(conf->energy_perf_pref_value); /* Enable Turbo */ enable_turbo(); + + if (is_tme_supported()) + set_tme_core_activate(); } static void per_cpu_smm_trigger(void) |