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authorAngel Pons <th3fanbus@gmail.com>2023-02-08 21:33:44 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2023-02-09 21:40:17 +0000
commit05df1084edecdd7a0e9560371debacfe70ab3896 (patch)
treee29c9a1f980cd4da51262d3b03440f99cbf15a53 /src
parentf411db35616b6eae983af83f53325fb53a4b3787 (diff)
mb/prodrive/hermes: Hook up wake on USB option
Hook up the `wake_on_usb` EEPROM setting so that it works as intended. TEST=Keysmash on a USB keyboard, verify Hermes does not wake from S3. Change-Id: I81531b90abae6a62754ea66c47e934e1f440bda2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72906 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/prodrive/hermes/mainboard.c13
-rw-r--r--src/soc/intel/cannonlake/acpi/xhci.asl6
2 files changed, 19 insertions, 0 deletions
diff --git a/src/mainboard/prodrive/hermes/mainboard.c b/src/mainboard/prodrive/hermes/mainboard.c
index 0b0eb88ff6..18bd8a48b7 100644
--- a/src/mainboard/prodrive/hermes/mainboard.c
+++ b/src/mainboard/prodrive/hermes/mainboard.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <bootstate.h>
#include <cbmem.h>
@@ -217,6 +218,18 @@ static void mainboard_acpi_fill_ssdt(const struct device *dev)
acpigen_write_soc_gpio_op(usb_power_gpios[i]);
}
acpigen_pop_len();
+
+ if (!board_cfg->wake_on_usb) {
+ acpigen_write_if();
+ acpigen_emit_byte(LNOT_OP);
+ acpigen_emit_byte(LLESS_OP);
+ acpigen_emit_byte(ARG0_OP);
+ acpigen_write_integer(ACPI_S3);
+ {
+ acpigen_write_store_int_to_namestr(0, "\\_SB.PCI0.XHCI.PMEE");
+ }
+ acpigen_pop_len();
+ }
}
acpigen_pop_len();
}
diff --git a/src/soc/intel/cannonlake/acpi/xhci.asl b/src/soc/intel/cannonlake/acpi/xhci.asl
index fbe811e952..bc4574d222 100644
--- a/src/soc/intel/cannonlake/acpi/xhci.asl
+++ b/src/soc/intel/cannonlake/acpi/xhci.asl
@@ -87,6 +87,12 @@ Device (XHCI)
Offset (0x10),
, 16,
XMEM, 16, /* MEM_BASE */
+ Offset (0x74),
+ D0D3, 2, /* POWERSTATE */
+ , 6,
+ PMEE, 1, /* PME_EN */
+ , 6,
+ PMES, 1, /* PME_STS */
}
Method (_PS0, 0, Serialized)