diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-08-05 09:32:37 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-08-09 15:03:21 +0000 |
| commit | 04c71deceb7ebb5ab89a43a2f9c3e495d5f0aaf3 (patch) | |
| tree | 61bf07516e5a457f845e70da9cc6478572972b30 /src | |
| parent | 72c0b54efb5780637c5d6fde5b423af199d454e5 (diff) | |
drivers/spi/acpi: Update _S0W return value to D3hot
In order to support wake from D3cold, most devices require extra
circuitry and possibly out-of-band communications to the host.
Therefore, assume that most SPI peripherals that do have wake
capabilities support wake from D3hot rather than D3cold.
This also allows coreboot to expose a power resource to perform power
sequencing for a SPI peripheral that is intended to retain power in
S3/S0ix.
If support for a device with d3cold wake support is needed, it could be
added in later as an option.
BUG=b:187228954
TEST=compile
Change-Id: I1d739b49c1a43007eb0199fe39b3b7d7375e6577
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56833
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/spi/acpi/acpi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/spi/acpi/acpi.c b/src/drivers/spi/acpi/acpi.c index b23bc9d7a9..abebd88095 100644 --- a/src/drivers/spi/acpi/acpi.c +++ b/src/drivers/spi/acpi/acpi.c @@ -125,7 +125,7 @@ static void spi_acpi_fill_ssdt_generator(const struct device *dev) /* Wake capabilities */ if (config->wake) { - acpigen_write_name_integer("_S0W", 4); + acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_HOT); acpigen_write_PRW(config->wake, 3); }; |