summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2015-03-28 23:56:22 -0500
committerAaron Durbin <adurbin@chromium.org>2015-05-26 22:33:53 +0200
commit0424c95a6dafdb65070538d6c5aa394b75eb9850 (patch)
treef5bd9f485a1a44eece1662a29c1435a44ab5c58a /src
parentb6981c0f9c4ce89c4209c14fb326a414096f2ff1 (diff)
fmap: new API using region_device
Instead of being pointer based use the region infrastrucutre. Additionally, this removes the need for arch-specific compilation paths. The users of the new API can use the region APIs to memory map or read the region provided by the new fmap API. Change-Id: Ie36e9ff9cb554234ec394b921f029eeed6845aee Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9170 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/Kconfig9
-rw-r--r--src/drivers/elog/elog.c49
-rw-r--r--src/include/fmap.h35
-rw-r--r--src/include/fmap_serialized.h (renamed from src/vendorcode/google/chromeos/fmap.h)14
-rw-r--r--src/lib/Makefile.inc5
-rw-r--r--src/lib/fmap.c119
-rw-r--r--src/mainboard/google/butterfly/mainboard.c41
-rw-r--r--src/mainboard/google/panther/lan.c25
-rw-r--r--src/northbridge/intel/haswell/mrccache.c28
-rw-r--r--src/northbridge/intel/sandybridge/mrccache.c29
-rw-r--r--src/soc/intel/common/mrc_cache.c27
-rw-r--r--src/vendorcode/google/chromeos/Kconfig9
-rw-r--r--src/vendorcode/google/chromeos/Makefile.inc4
-rw-r--r--src/vendorcode/google/chromeos/cros_vpd.c30
-rw-r--r--src/vendorcode/google/chromeos/vboot2/vboot_handoff.c2
-rw-r--r--src/vendorcode/google/chromeos/vboot_common.c14
16 files changed, 293 insertions, 147 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 5cfb06fce1..26e1194105 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -244,6 +244,15 @@ config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
The relocated ramstage is saved in an area specified by the
by the board and/or chipset.
+config FLASHMAP_OFFSET
+ hex "Flash Map Offset"
+ default 0x00670000 if NORTHBRIDGE_INTEL_SANDYBRIDGE
+ default 0x00610000 if NORTHBRIDGE_INTEL_IVYBRIDGE
+ default CBFS_SIZE if !ARCH_X86
+ default 0
+ help
+ Offset of flash map in firmware image
+
choice
prompt "Bootblock behaviour"
default BOOTBLOCK_SIMPLE
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index da1f6fa1c0..8dce86b698 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -26,6 +26,7 @@
#include <pc80/mc146818rtc.h>
#endif
#include <bcd.h>
+#include <fmap.h>
#include <rtc.h>
#include <smbios.h>
#include <spi-generic.h>
@@ -35,7 +36,6 @@
#include <elog.h>
#include "elog_internal.h"
-#include <vendorcode/google/chromeos/fmap.h>
#if !IS_ENABLED(CONFIG_CHROMEOS) && CONFIG_ELOG_FLASH_BASE == 0
#error "CONFIG_ELOG_FLASH_BASE is invalid"
@@ -86,26 +86,6 @@ static inline u32 get_rom_size(void)
}
/*
- * Convert a memory mapped flash address into a flash offset
- */
-static inline u32 elog_flash_address_to_offset(u8 *address)
-{
-#if CONFIG_ARCH_X86
- /* For x86, assume address is memory-mapped near 4GB */
- u32 rom_size;
-
- if (!elog_spi)
- return 0;
-
- rom_size = get_rom_size();
-
- return (u32)address - ((u32)~0UL - rom_size + 1);
-#else
- return (u32)(uintptr_t)address;
-#endif
-}
-
-/*
* Pointer to an event log header in the event data area
*/
static inline struct event_header*
@@ -517,21 +497,22 @@ static void elog_find_flash(void)
{
elog_debug("elog_find_flash()\n");
-#if CONFIG_CHROMEOS
- /* Find the ELOG base and size in FMAP */
- u8 *flash_base_ptr;
- int fmap_size = find_fmap_entry("RW_ELOG", (void **)&flash_base_ptr);
- if (fmap_size < 0) {
- printk(BIOS_WARNING, "ELOG: Unable to find RW_ELOG in FMAP\n");
- flash_base = total_size = 0;
+ if (IS_ENABLED(CONFIG_CHROMEOS)) {
+ /* Find the ELOG base and size in FMAP */
+ struct region r;
+
+ if (fmap_locate_area("RW_ELOG", &r) < 0) {
+ printk(BIOS_WARNING,
+ "ELOG: Unable to find RW_ELOG in FMAP\n");
+ flash_base = total_size = 0;
+ } else {
+ flash_base = region_offset(&r);
+ total_size = MIN(region_sz(&r), CONFIG_ELOG_AREA_SIZE);
+ }
} else {
- flash_base = elog_flash_address_to_offset(flash_base_ptr);
- total_size = MIN(fmap_size, CONFIG_ELOG_AREA_SIZE);
+ flash_base = CONFIG_ELOG_FLASH_BASE;
+ total_size = CONFIG_ELOG_AREA_SIZE;
}
-#else
- flash_base = CONFIG_ELOG_FLASH_BASE;
- total_size = CONFIG_ELOG_AREA_SIZE;
-#endif
log_size = total_size - sizeof(struct elog_header);
full_threshold = log_size - ELOG_MIN_AVAILABLE_ENTRIES * MAX_EVENT_SIZE;
shrink_size = MIN(total_size * ELOG_SHRINK_PERCENTAGE / 100,
diff --git a/src/include/fmap.h b/src/include/fmap.h
new file mode 100644
index 0000000000..e575bbf3fc
--- /dev/null
+++ b/src/include/fmap.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef _FMAP_H_
+#define _FMAP_H_
+
+#include <region.h>
+
+/* Locate the named area in the fmap and fill in a region device representing
+ * that area. The region is a sub-region of the readonly boot media. Return
+ * 0 on success, < 0 on error. */
+int fmap_locate_area_as_rdev(const char *name, struct region_device *area);
+
+/* Locate the named area in the fmap and fill in a region with the
+ * offset and size of that area within the boot media. Return 0 on success,
+ * < 0 on error. */
+int fmap_locate_area(const char *name, struct region *r);
+
+#endif
diff --git a/src/vendorcode/google/chromeos/fmap.h b/src/include/fmap_serialized.h
index 05d3fb6e1d..3585f0bc84 100644
--- a/src/vendorcode/google/chromeos/fmap.h
+++ b/src/include/fmap_serialized.h
@@ -33,12 +33,12 @@
* Software Foundation.
*/
-#ifndef FLASHMAP_LIB_FMAP_H__
-#define FLASHMAP_LIB_FMAP_H__
+#ifndef FLASHMAP_SERIALIZED_H__
+#define FLASHMAP_SERIALIZED_H__
#include <stdint.h>
-#define FMAP_REVERSED_SIGNATURE "__PAMF__" /* avoid magic number in .rodata */
+#define FMAP_SIGNATURE "__FMAP__"
#define FMAP_VER_MAJOR 1 /* this header's FMAP minor version */
#define FMAP_VER_MINOR 1 /* this header's FMAP minor version */
#define FMAP_STRLEN 32 /* maximum length for strings, */
@@ -70,10 +70,4 @@ struct fmap {
struct fmap_area areas[];
} __attribute__((packed));
-
-/* coreboot specific function prototypes */
-const struct fmap *fmap_find(void);
-const struct fmap_area *find_fmap_area(const struct fmap *fmap,
- const char name[]);
-int find_fmap_entry(const char name[], void **pointer);
-#endif /* FLASHMAP_LIB_FMAP_H__*/
+#endif /* FLASHMAP_SERIALIZED_H__ */
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index adc4990942..5ec9de72ed 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -32,12 +32,14 @@ bootblock-y += memcmp.c
bootblock-y += mem_pool.c
bootblock-y += region.c
bootblock-y += boot_device.c
+bootblock-y += fmap.c
verstage-y += prog_ops.c
verstage-y += delay.c
verstage-y += cbfs.c
verstage-y += cbfs_core.c
verstage-y += halt.c
+verstage-y += fmap.c
verstage-y += memcmp.c
verstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
verstage-y += region.c
@@ -62,6 +64,7 @@ $(foreach arch,$(ARCH_SUPPORTED),\
$(eval rmodules_$(arch)-y += memcmp.c) \
$(eval rmodules_$(arch)-y += rmodule.ld))
+romstage-y += fmap.c
romstage-$(CONFIG_I2C_TPM) += delay.c
romstage-y += cbfs.c cbfs_core.c
romstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
@@ -89,6 +92,7 @@ ramstage-y += hardwaremain.c
ramstage-y += selfboot.c
ramstage-y += coreboot_table.c
ramstage-y += bootmem.c
+ramstage-y += fmap.c
ramstage-y += memchr.c
ramstage-y += memcmp.c
ramstage-y += malloc.c
@@ -148,6 +152,7 @@ ramstage-y += boot_device.c
smm-y += region.c
smm-y += boot_device.c
+smm-y += fmap.c
smm-y += cbfs.c cbfs_core.c memcmp.c
smm-$(CONFIG_COMPILER_GCC) += gcc.c
diff --git a/src/lib/fmap.c b/src/lib/fmap.c
new file mode 100644
index 0000000000..0f48cdc414
--- /dev/null
+++ b/src/lib/fmap.c
@@ -0,0 +1,119 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2012-2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <boot_device.h>
+#include <console/console.h>
+#include <fmap.h>
+#include <fmap_serialized.h>
+#include <stddef.h>
+#include <string.h>
+
+/*
+ * See http://code.google.com/p/flashmap/ for more information on FMAP.
+ */
+
+static int find_fmap_directory(struct region_device *fmrd)
+{
+ const struct region_device *boot;
+ struct fmap *fmap;
+ size_t fmap_size;
+ size_t offset = CONFIG_FLASHMAP_OFFSET;
+
+ boot_device_init();
+ boot = boot_device_ro();
+
+ if (boot == NULL)
+ return -1;
+
+ fmap_size = sizeof(struct fmap);
+
+ fmap = rdev_mmap(boot, offset, fmap_size);
+
+ if (fmap == NULL)
+ return -1;
+
+ if (memcmp(fmap->signature, FMAP_SIGNATURE, sizeof(fmap->signature))) {
+ printk(BIOS_DEBUG, "No FMAP found at %zx offset.\n", offset);
+ rdev_munmap(boot, fmap);
+ return -1;
+ }
+
+ printk(BIOS_DEBUG, "FMAP: Found \"%s\" version %d.%d at %zx.\n",
+ fmap->name, fmap->ver_major, fmap->ver_minor, offset);
+ printk(BIOS_DEBUG, "FMAP: base = %llx size = %x #areas = %d\n",
+ (long long)fmap->base, fmap->size, fmap->nareas);
+
+ fmap_size += fmap->nareas * sizeof(struct fmap_area);
+
+ rdev_munmap(boot, fmap);
+
+ return rdev_chain(fmrd, boot, offset, fmap_size);
+}
+
+int fmap_locate_area_as_rdev(const char *name, struct region_device *area)
+{
+ struct region ar;
+
+ if (fmap_locate_area(name, &ar))
+ return -1;
+
+ return boot_device_ro_subregion(&ar, area);
+}
+
+int fmap_locate_area(const char *name, struct region *ar)
+{
+ struct region_device fmrd;
+ size_t offset;
+
+ if (find_fmap_directory(&fmrd))
+ return -1;
+
+ /* Start reading the areas just after fmap header. */
+ offset = sizeof(struct fmap);
+
+ while (1) {
+ struct fmap_area *area;
+
+ area = rdev_mmap(&fmrd, offset, sizeof(*area));
+
+ if (area == NULL)
+ return -1;
+
+ if (strcmp((const char *)area->name, name)) {
+ rdev_munmap(&fmrd, area);
+ offset += sizeof(struct fmap_area);
+ continue;
+ }
+
+ printk(BIOS_DEBUG, "FMAP: area %s found\n", name);
+ printk(BIOS_DEBUG, "FMAP: offset: %x\n", area->offset);
+ printk(BIOS_DEBUG, "FMAP: size: %d bytes\n", area->size);
+
+ ar->offset = area->offset;
+ ar->size = area->size;
+
+ rdev_munmap(&fmrd, area);
+
+ return 0;
+ }
+
+ printk(BIOS_DEBUG, "FMAP: area %s not found\n", name);
+
+ return -1;
+}
diff --git a/src/mainboard/google/butterfly/mainboard.c b/src/mainboard/google/butterfly/mainboard.c
index bd2fbd5218..e09336d675 100644
--- a/src/mainboard/google/butterfly/mainboard.c
+++ b/src/mainboard/google/butterfly/mainboard.c
@@ -20,11 +20,13 @@
#include <types.h>
#include <string.h>
+#include <cbfs.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <drivers/intel/gma/int15.h>
+#include <fmap.h>
#include <pc80/mc146818rtc.h>
#include <arch/acpi.h>
#include <arch/io.h>
@@ -36,11 +38,6 @@
#include <smbios.h>
#include <device/pci.h>
#include <ec/quanta/ene_kb3940q/ec.h>
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/fmap.h>
-#else
-#include <cbfs.h>
-#endif
static unsigned int search(char *p, char *a, unsigned int lengthp,
unsigned int lengtha)
@@ -200,20 +197,30 @@ static void mainboard_init(device_t dev)
size_t search_length = -1;
u16 io_base = 0;
struct device *ethernet_dev = NULL;
-#if CONFIG_CHROMEOS
- char **vpd_region_ptr = NULL;
- search_length = find_fmap_entry("RO_VPD", (void **)vpd_region_ptr);
- search_address = (unsigned long)(*vpd_region_ptr);
-#else
- void *vpd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "vpd.bin",
- CBFS_TYPE_RAW, &search_length);
- if (vpd_file) {
- search_address = (unsigned long)vpd_file;
+ void *vpd_file;
+
+ if (IS_ENABLED(CONFIG_CHROMEOS)) {
+ struct region_device rdev;
+
+ if (fmap_locate_area_as_rdev("RO_VPD", &rdev) == 0) {
+ vpd_file = rdev_mmap_full(&rdev);
+
+ if (vpd_file != NULL) {
+ search_length = region_device_sz(&rdev);
+ search_address = (uintptr_t)vpd_file;
+ }
+ }
} else {
- search_length = -1;
- search_address = 0;
+ vpd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
+ "vpd.bin", CBFS_TYPE_RAW,
+ &search_length);
+ if (vpd_file) {
+ search_address = (unsigned long)vpd_file;
+ } else {
+ search_length = -1;
+ search_address = 0;
+ }
}
-#endif
/* Initialize the Embedded Controller */
butterfly_ec_init();
diff --git a/src/mainboard/google/panther/lan.c b/src/mainboard/google/panther/lan.c
index 9fd325f5d2..8a648cb250 100644
--- a/src/mainboard/google/panther/lan.c
+++ b/src/mainboard/google/panther/lan.c
@@ -24,8 +24,8 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <fmap.h>
#include <southbridge/intel/bd82x6x/pch.h>
-#include <vendorcode/google/chromeos/fmap.h>
#include "onboard.h"
static unsigned int search(char *p, u8 *a, unsigned int lengthp,
@@ -117,15 +117,24 @@ static void program_mac_address(u16 io_base)
u32 high_dword = 0xD0BA00A0; /* high dword of mac address */
u32 low_dword = 0x0000AD0B; /* low word of mac address as a dword */
-#if CONFIG_CHROMEOS
- search_length = find_fmap_entry("RO_VPD", &search_address);
-#else
- search_address = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "vpd.bin",
- CBFS_TYPE_RAW, &search_length);
-#endif
+ if (IS_ENABLED(CONFIG_CHROMEOS)) {
+ struct region_device rdev;
+
+ if (fmap_locate_area_as_rdev("RO_VPD", &rdev) == 0) {
+ search_address = rdev_mmap_full(&rdev);
+
+ if (search_address != NULL)
+ search_length = region_device_sz(&rdev);
+ }
+ } else {
+ search_address = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
+ "vpd.bin",
+ CBFS_TYPE_RAW,
+ &search_length);
+ }
if (search_length <= 0)
- printk(BIOS_ERR, "LAN: find_fmap_entry returned -1.\n");
+ printk(BIOS_ERR, "LAN: VPD not found.\n");
else
get_mac_address(&high_dword, &low_dword, search_address,
search_length);
diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c
index 3bb7fa5947..d72c2c3224 100644
--- a/src/northbridge/intel/haswell/mrccache.c
+++ b/src/northbridge/intel/haswell/mrccache.c
@@ -22,6 +22,7 @@
#include <bootstate.h>
#include <console/console.h>
#include <cbfs.h>
+#include <fmap.h>
#include <ip_checksum.h>
#include <device/device.h>
#include <cbmem.h>
@@ -29,9 +30,6 @@
#include "haswell.h"
#include <spi-generic.h>
#include <spi_flash.h>
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/fmap.h>
-#endif
/* convert a pointer to flash area into the offset inside the flash */
static inline u32 to_flash_offset(struct spi_flash *flash, void *p) {
@@ -66,16 +64,22 @@ static int is_mrc_cache(struct mrc_data_container *mrc_cache)
*/
static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
{
-#if CONFIG_CHROMEOS
- return find_fmap_entry("RW_MRC_CACHE", (void **)mrc_region_ptr);
-#else
- size_t region_size;
- *mrc_region_ptr = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
- "mrc.cache",
- CBFS_TYPE_MRC_CACHE,
- &region_size);
+ size_t region_size = 0;
+
+ if (IS_ENABLED(CONFIG_CHROMEOS)) {
+ struct region_device rdev;
+
+ if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) {
+ region_size = region_device_sz(&rdev);
+ *mrc_region_ptr = rdev_mmap_full(&rdev);
+ }
+ } else {
+ *mrc_region_ptr = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
+ "mrc.cache",
+ CBFS_TYPE_MRC_CACHE,
+ &region_size);
+ }
return region_size;
-#endif
}
/*
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index e5f74e88c2..e17c54b7cd 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -22,6 +22,7 @@
#include <bootstate.h>
#include <console/console.h>
#include <cbfs.h>
+#include <fmap.h>
#include <ip_checksum.h>
#include <device/device.h>
#include <cbmem.h>
@@ -29,9 +30,6 @@
#include "sandybridge.h"
#include <spi-generic.h>
#include <spi_flash.h>
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/fmap.h>
-#endif
/* convert a pointer to flash area into the offset inside the flash */
static inline u32 to_flash_offset(struct spi_flash *flash, void *p) {
@@ -66,17 +64,22 @@ static int is_mrc_cache(struct mrc_data_container *mrc_cache)
*/
static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
{
-#if CONFIG_CHROMEOS
- return find_fmap_entry("RW_MRC_CACHE", (void **)mrc_region_ptr);
-#else
- size_t region_size;
- *mrc_region_ptr = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
- "mrc.cache",
- CBFS_TYPE_MRC_CACHE,
- &region_size);
- return region_size;
-#endif
+ size_t region_size = 0;
+
+ if (IS_ENABLED(CONFIG_CHROMEOS)) {
+ struct region_device rdev;
+ if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) {
+ region_size = region_device_sz(&rdev);
+ *mrc_region_ptr = rdev_mmap_full(&rdev);
+ }
+ } else {
+ *mrc_region_ptr = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
+ "mrc.cache",
+ CBFS_TYPE_MRC_CACHE,
+ &region_size);
+ }
+ return region_size;
}
/*
diff --git a/src/soc/intel/common/mrc_cache.c b/src/soc/intel/common/mrc_cache.c
index 9366aa52f4..6783f18fe3 100644
--- a/src/soc/intel/common/mrc_cache.c
+++ b/src/soc/intel/common/mrc_cache.c
@@ -20,10 +20,8 @@
#include <string.h>
#include <console/console.h>
#include <cbmem.h>
+#include <fmap.h>
#include <ip_checksum.h>
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/fmap.h>
-#endif
#include "mrc_cache.h"
#define MRC_DATA_ALIGN 0x1000
@@ -39,16 +37,23 @@ struct mrc_data_region {
/* common code */
static int mrc_cache_get_region(struct mrc_data_region *region)
{
-#if CONFIG_CHROMEOS
- int ret;
- ret = find_fmap_entry("RW_MRC_CACHE", &region->base);
- if (ret >= 0) {
- region->size = ret;
+ if (IS_ENABLED(CONFIG_CHROMEOS)) {
+ struct region_device rdev;
+
+ if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev))
+ return -1;
+
+ region->size = region_device_sz(&rdev);
+ region->base = rdev_mmap_full(&rdev);
+
+ if (region->base == NULL)
+ return -1;
+
return 0;
+ } else {
+ region->base = (void *)CONFIG_MRC_SETTINGS_CACHE_BASE;
+ region->size = CONFIG_MRC_SETTINGS_CACHE_SIZE;
}
-#endif
- region->base = (void *)CONFIG_MRC_SETTINGS_CACHE_BASE;
- region->size = CONFIG_MRC_SETTINGS_CACHE_SIZE;
return 0;
}
diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig
index 17bbc316ce..4e7fdac5e2 100644
--- a/src/vendorcode/google/chromeos/Kconfig
+++ b/src/vendorcode/google/chromeos/Kconfig
@@ -92,15 +92,6 @@ config CHROMEOS_RAMOOPS_RAM_SIZE
default 0x00100000
depends on CHROMEOS_RAMOOPS
-config FLASHMAP_OFFSET
- hex "Flash Map Offset"
- default 0x00670000 if NORTHBRIDGE_INTEL_SANDYBRIDGE
- default 0x00610000 if NORTHBRIDGE_INTEL_IVYBRIDGE
- default CBFS_SIZE if !ARCH_X86
- default 0
- help
- Offset of flash map in firmware image
-
config EC_SOFTWARE_SYNC
bool "Enable EC software sync"
default n
diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc
index 5c7140fc36..67beabac1e 100644
--- a/src/vendorcode/google/chromeos/Makefile.inc
+++ b/src/vendorcode/google/chromeos/Makefile.inc
@@ -35,11 +35,7 @@ ramstage-$(CONFIG_CHROMEOS_VBNV_FLASH) += vbnv_flash.c
romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vboot.c
ramstage-$(CONFIG_ELOG) += elog.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += gnvs.c
-verstage-y += fmap.c
-romstage-y += fmap.c
-ramstage-y += fmap.c
ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c
-smm-y += fmap.c
romstage-y += vpd_decode.c cros_vpd.c
ramstage-y += vpd_decode.c cros_vpd.c vpd_mac.c vpd_serialno.c vpd_calibration.c
ifeq ($(CONFIG_ARCH_X86)$(CONFIG_ARCH_MIPS),)
diff --git a/src/vendorcode/google/chromeos/cros_vpd.c b/src/vendorcode/google/chromeos/cros_vpd.c
index c0e483019b..fed1d82344 100644
--- a/src/vendorcode/google/chromeos/cros_vpd.c
+++ b/src/vendorcode/google/chromeos/cros_vpd.c
@@ -6,12 +6,11 @@
#include <console/console.h>
-#include <cbfs.h>
+#include <fmap.h>
#include <stdlib.h>
#include <string.h>
#include "cros_vpd.h"
-#include "fmap.h"
#include "lib_vpd.h"
#include "vpd_tables.h"
@@ -35,9 +34,7 @@ static int cros_vpd_load(uint8_t **vpd_address, int32_t *vpd_size)
MAYBE_STATIC int result = -1;
struct google_vpd_info info;
int32_t base;
-
- const struct fmap_area *area;
- struct cbfs_media media;
+ struct region_device vpd;
if (cached) {
*vpd_address = cached_address;
@@ -46,32 +43,31 @@ static int cros_vpd_load(uint8_t **vpd_address, int32_t *vpd_size)
}
cached = 1;
- area = find_fmap_area(fmap_find(), "RO_VPD");
- if (!area) {
+ if (fmap_locate_area_as_rdev("RO_VPD", &vpd)) {
printk(BIOS_ERR, "%s: No RO_VPD FMAP section.\n", __func__);
return result;
}
- if (area->size <= GOOGLE_VPD_2_0_OFFSET + sizeof(info)) {
+
+ base = 0;
+ cached_size = region_device_sz(&vpd);
+
+ if ((cached_size < GOOGLE_VPD_2_0_OFFSET + sizeof(info)) ||
+ rdev_chain(&vpd, &vpd, GOOGLE_VPD_2_0_OFFSET,
+ cached_size - GOOGLE_VPD_2_0_OFFSET)) {
printk(BIOS_ERR, "%s: Too small (%d) for Google VPD 2.0.\n",
- __func__, area->size);
+ __func__, cached_size);
return result;
}
- base = area->offset + GOOGLE_VPD_2_0_OFFSET;
- cached_size = area->size - GOOGLE_VPD_2_0_OFFSET;
- init_default_cbfs_media(&media);
- media.open(&media);
-
/* Try if we can find a google_vpd_info, otherwise read whole VPD. */
- if (media.read(&media, &info, base, sizeof(info)) == sizeof(info) &&
+ if (rdev_readat(&vpd, &info, base, sizeof(info)) == sizeof(info) &&
memcmp(info.header.magic, VPD_INFO_MAGIC, sizeof(info.header.magic))
== 0 && cached_size >= info.size + sizeof(info)) {
base += sizeof(info);
cached_size = info.size;
}
- cached_address = media.map(&media, base, cached_size);
- media.close(&media);
+ cached_address = rdev_mmap(&vpd, base, cached_size);
if (cached_address) {
*vpd_address = cached_address;
*vpd_size = cached_size;
diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
index 38f77a6e76..e7e0d99632 100644
--- a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
+++ b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
@@ -26,13 +26,13 @@
#include <cbmem.h>
#include <console/console.h>
#include <console/vtxprintf.h>
+#include <fmap.h>
#include <stdlib.h>
#include <timestamp.h>
#define NEED_VB20_INTERNALS /* TODO: remove me! */
#include <vb2_api.h>
#include <vboot_struct.h>
#include "../chromeos.h"
-#include "../fmap.h"
#include "../vboot_handoff.h"
#include "misc.h"
diff --git a/src/vendorcode/google/chromeos/vboot_common.c b/src/vendorcode/google/chromeos/vboot_common.c
index f593c7b43b..1db9d96aea 100644
--- a/src/vendorcode/google/chromeos/vboot_common.c
+++ b/src/vendorcode/google/chromeos/vboot_common.c
@@ -22,27 +22,19 @@
#include <cbmem.h>
#include <console/cbmem_console.h>
#include <console/console.h>
+#include <fmap.h>
#include <reset.h>
#include <stddef.h>
#include <string.h>
#include "chromeos.h"
-#include "fmap.h"
#include "vboot_common.h"
#include "vboot_handoff.h"
void vboot_locate_region(const char *name, struct region *region)
{
- const struct fmap_area *area;
-
- region->size = 0;
-
- area = find_fmap_area(fmap_find(), name);
-
- if (area != NULL) {
- region->offset = area->offset;
- region->size = area->size;
- }
+ if (fmap_locate_area(name, region))
+ region->size = 0;
}
void *vboot_get_region(size_t offset, size_t size, void *dest)