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authorAnand Vaikar <a.vaikar2021@gmail.com>2023-03-29 15:29:40 +0530
committerFelix Held <felix-coreboot@felixheld.de>2023-04-18 15:16:37 +0000
commit03232e93d33fe107f6232c7979144bafd6245622 (patch)
treee01537bfeb73c282592af68d754645f9833659a9 /src
parent28eaa4a340fb4614ea42a456b7aba631c4dd744b (diff)
mb/amd/mayan: Correct PCIe bridge for M.2 NVMe SSD0
The M.2 NVMe SSD0 device is behind AMD PCIe bridge 0.2.4 (BDF), hence update the correct bridge number in the device tree. TEST: Builds and boots, the device enumerates. [DEBUG] PCI: 00:02.4 [1022/14ee] enabled [DEBUG] PCI: 01:00.0 [144d/a80a] enabled Signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com> Change-Id: I43096beda0405bd392574319d50e7cd6a7f8d291 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74075 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/amd/mayan/devicetree_phoenix.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/amd/mayan/devicetree_phoenix.cb b/src/mainboard/amd/mayan/devicetree_phoenix.cb
index 9d1a4b3a41..697db12f9f 100644
--- a/src/mainboard/amd/mayan/devicetree_phoenix.cb
+++ b/src/mainboard/amd/mayan/devicetree_phoenix.cb
@@ -160,7 +160,7 @@ chip soc/amd/phoenix
device ref iommu on end
device ref gpp_bridge_2_1 on end # GBE
device ref gpp_bridge_2_2 on end # WIFI
- device ref gpp_bridge_2_3 on end # NVMe SSD
+ device ref gpp_bridge_2_4 on end # NVMe SSD
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref gfx on end # Internal GPU (GFX)
device ref gfx_hda on end # Display HD Audio Controller (GFXAZ)