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authorTyler Wang <tyler.wang@quanta.corp-partner.google.com>2023-09-27 13:17:39 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-10-23 13:01:40 +0000
commit01e3c32f3638e44dfc18f0c3b262598055444289 (patch)
tree884993b3a8eaeee63aebd1e3991ccb25fb9e1454 /src
parent961cb4f04fb6d393ed124cb094ce873b6fa671c2 (diff)
mb/google/rex/var/karis: Modify TCC_offset to 10
Follow thermal team request, modify tcc_offset from 20 to 10. BUG=b:306548525 TEST=Build and verified by thermal team Change-Id: I7537e103be4cd1196c934ca72dbd61e064aed371 Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78490 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/rex/variants/karis/overridetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/karis/overridetree.cb b/src/mainboard/google/rex/variants/karis/overridetree.cb
index 09e8a3dab0..0c0e7fa441 100644
--- a/src/mainboard/google/rex/variants/karis/overridetree.cb
+++ b/src/mainboard/google/rex/variants/karis/overridetree.cb
@@ -72,6 +72,8 @@ chip soc/intel/meteorlake
[PchSerialIoIndexI2C5] = PchSerialIoPci,
}"
+ register "tcc_offset" = "10"
+
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |