diff options
| author | Furquan Shaikh <furquan@google.com> | 2016-06-21 11:44:10 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-06-21 22:01:55 +0200 |
| commit | e0667f7b54078870afbab0bc78afd5b3795c002f (patch) | |
| tree | b87ddcda48f5261070887b735bfb62a42225d21f /src | |
| parent | 49f7dd9982dad6a2660efb37277a9a1c88d1dcbd (diff) | |
google/reef: Keep ISH enabled for now
Disabling ISH causes resets in FSP which leads to hang. This should be
fixed in a later stepping. Until then keep ISH enabled.
BUG=chrome-os-partner:54033
Change-Id: Id9cb276eed8d027ab6d2e81a5ec962bc730c1ff5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15142
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/reef/devicetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/devicetree.cb b/src/mainboard/google/reef/devicetree.cb index e626a4c727..d8ddd462b3 100644 --- a/src/mainboard/google/reef/devicetree.cb +++ b/src/mainboard/google/reef/devicetree.cb @@ -6,6 +6,11 @@ chip soc/intel/apollolake register "pcie_rp4_clkreq_pin" = "0" # wifi/bt + # TODO(furquan): Remove this once global reset issue is fixed in later + # steppings. + # Integrated Sensor Hub + register "integrated_sensor_hub_enable" = "1" + # EMMC TX DATA Delay 1# # 0x0C[14:8] stands for 12*125 = 1500 pSec delay for HS400 # 0x11[6:0] stands for 17*125 = 2125 pSec delay for SDR104/HS200 |