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authorArthur Heymans <arthur@aheymans.xyz>2017-01-14 17:40:18 +0100
committerMartin Roth <martinroth@google.com>2017-01-25 19:02:28 +0100
commitdcad289841836f37ae8b885f59b80ecad690a22f (patch)
treebe6128bcbf2a2db77b8f74b8eb2affe9e1be9d86 /src
parent2a0e998ec2d1625c214bf181189bd61ce425f0ed (diff)
mb/intel/d510mo: Add cmos.layout and cmos.default
Change-Id: I877d4470b697d6a6d4652ed1c60028cdcbe8df98 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18143 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/d510mo/Kconfig2
-rw-r--r--src/mainboard/intel/d510mo/cmos.default6
-rw-r--r--src/mainboard/intel/d510mo/cmos.layout98
3 files changed, 106 insertions, 0 deletions
diff --git a/src/mainboard/intel/d510mo/Kconfig b/src/mainboard/intel/d510mo/Kconfig
index 7184665643..7131b3ad13 100644
--- a/src/mainboard/intel/d510mo/Kconfig
+++ b/src/mainboard/intel/d510mo/Kconfig
@@ -25,6 +25,8 @@ config BOARD_SPECIFIC_OPTIONS
select BOARD_ROMSIZE_KB_1024
select MAINBOARD_HAS_NATIVE_VGA_INIT
select INTEL_INT15
+ select HAVE_OPTION_TABLE
+ select HAVE_CMOS_DEFAULT
config MAX_CPUS
int
diff --git a/src/mainboard/intel/d510mo/cmos.default b/src/mainboard/intel/d510mo/cmos.default
new file mode 100644
index 0000000000..488aa37bcc
--- /dev/null
+++ b/src/mainboard/intel/d510mo/cmos.default
@@ -0,0 +1,6 @@
+boot_option=Fallback
+baud_rate=115200
+debug_level=Spew
+power_on_after_fail=Disable
+nmi=Enable
+gfx_uma_size=8M
diff --git a/src/mainboard/intel/d510mo/cmos.layout b/src/mainboard/intel/d510mo/cmos.layout
new file mode 100644
index 0000000000..3e96412b8d
--- /dev/null
+++ b/src/mainboard/intel/d510mo/cmos.layout
@@ -0,0 +1,98 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+## Copyright (C) 2014 Vladimir Serbinenko
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+# -----------------------------------------------------------------
+entries
+
+
+# -----------------------------------------------------------------
+0 120 r 0 reserved_memory
+#120 264 r 0 unused
+
+# -----------------------------------------------------------------
+# RTC_BOOT_BYTE (coreboot hardcoded)
+384 1 e 4 boot_option
+388 4 h 0 reboot_counter
+#390 2 r 0 unused?
+
+# -----------------------------------------------------------------
+# coreboot config options: console
+392 3 e 5 baud_rate
+395 4 e 6 debug_level
+#399 1 r 0 unused
+
+#400 8 r 0 reserved for century byte
+
+# coreboot config options: southbridge
+408 1 e 1 nmi
+409 2 e 7 power_on_after_fail
+
+# coreboot config options: bootloader
+416 512 s 0 boot_devices
+
+# coreboot config options: cpu
+944 1 e 2 hyper_threading
+#945 7 r 0 unused
+
+# coreboot config options: northbridge
+952 3 e 11 gfx_uma_size
+
+# coreboot config options: check sums
+984 16 h 0 check_sum
+
+# -----------------------------------------------------------------
+
+enumerations
+
+#ID value text
+1 0 Disable
+1 1 Enable
+2 0 Enable
+2 1 Disable
+4 0 Fallback
+4 1 Normal
+5 0 115200
+5 1 57600
+5 2 38400
+5 3 19200
+5 4 9600
+5 5 4800
+5 6 2400
+5 7 1200
+6 1 Emergency
+6 2 Alert
+6 3 Critical
+6 4 Error
+6 5 Warning
+6 6 Notice
+6 7 Info
+6 8 Debug
+6 9 Spew
+7 0 Disable
+7 1 Enable
+7 2 Keep
+11 0 8M
+11 1 16M
+11 2 32M
+11 3 48M
+11 4 64M
+11 5 128M
+11 6 256M
+
+# -----------------------------------------------------------------
+checksums
+
+checksum 392 983 984