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| author | Matt DeVillier <matt.devillier@gmail.com> | 2018-12-25 22:10:48 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-03 10:11:55 +0000 |
| commit | aa3b5e29f2a6f15034f4a195c5871b4189350ddc (patch) | |
| tree | 1f8d8bbec934222db5aace6c4343ed48e70b1920 /src | |
| parent | bd6bdc5c1dce962188247e2e7abbd8292a76eb51 (diff) | |
soc/braswell: hook up smmstore
Adapted from implementation in sb/intel/common.
Test: build/boot variants of google/cyan with Tianocore
and SMMSTORE enabled
Change-Id: Ife4681983d0eecbc01c539b477664f3dd8bb9368
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/braswell/smihandler.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/smihandler.c b/src/soc/intel/braswell/smihandler.c index 80b142aad8..31b059c545 100644 --- a/src/soc/intel/braswell/smihandler.c +++ b/src/soc/intel/braswell/smihandler.c @@ -30,6 +30,7 @@ #include <spi-generic.h> #include <stdint.h> #include <soc/gpio.h> +#include <smmstore.h> /* GNVS needs to be set by coreboot initiating a software SMI. */ static global_nvs_t *gnvs; @@ -279,6 +280,26 @@ static void southbridge_smi_gsmi(void) *ret = gsmi_exec(sub_command, param); } +static void southbridge_smi_store(void) +{ + u8 sub_command, ret; + em64t100_smm_state_save_area_t *io_smi = + smi_apmc_find_state_save(APM_CNT_SMMSTORE); + uint32_t reg_ebx; + + if (!io_smi) + return; + /* Command and return value in EAX */ + sub_command = (io_smi->rax >> 8) & 0xff; + + /* Parameter buffer in EBX */ + reg_ebx = io_smi->rbx; + + /* drivers/smmstore/smi.c */ + ret = smmstore_exec(sub_command, (void *)reg_ebx); + io_smi->rax = ret; +} + static void southbridge_smi_apmc(void) { uint8_t reg8; @@ -330,6 +351,10 @@ static void southbridge_smi_apmc(void) if (CONFIG(ELOG_GSMI)) southbridge_smi_gsmi(); break; + case APM_CNT_SMMSTORE: + if (CONFIG(SMMSTORE)) + southbridge_smi_store(); + break; } mainboard_smi_apmc(reg8); |