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authorPatrick Rudolph <siro@das-labor.org>2016-02-06 13:03:21 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-02-18 01:39:06 +0100
commit801471436efd7cfa4cefc7af40c6db015e49a450 (patch)
treeebcb0aa7fcb8b7334c9ceed9704726b43f0756a1 /src
parente8e66f47631c505ab153d8a348058350b9acfe88 (diff)
southbridge/intel/bd82x6x/acpi: Fix IRQ warnings
The PCIe slot uses Message Signaled Interrupts (MSI) as the IGD does and doesn't use hardware INT lines. Adding the IRQ entry for PEG slot fixes a warning showing up in GNU/Linux dmesg. Test system: * Intel IvyBridge * Gigabyte GA-B75M-D3H Change-Id: I5ac40e7bea9a659c6c89262aac4552bc8177a9e5 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/13612 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl12
1 files changed, 11 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl b/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
index a485bc12f1..0e6f9605e2 100644
--- a/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
@@ -20,7 +20,12 @@ Method(_PRT)
If (PICM) {
Return (Package() {
/* Onboard graphics (IGD) 0:2.0 */
- Package() { 0x0002ffff, 0, 0, 16 },/* GFX INTA -> PIRQA (MSI) */
+ Package() { 0x0002ffff, 0, 0, 16 },/* GFX INTA -> PIRQA (MSI) */
+ /* PCI Express Graphics (PEG) 0:1.0 */
+ Package() { 0x0001ffff, 0, 0, 16 },/* GFX PCIe INTA -> PIRQA (MSI) */
+ Package() { 0x0001ffff, 0, 0, 17 },/* GFX PCIe INTB -> PIRQB (MSI) */
+ Package() { 0x0001ffff, 0, 0, 18 },/* GFX PCIe INTC -> PIRQC (MSI) */
+ Package() { 0x0001ffff, 0, 0, 19 },/* GFX PCIe INTD -> PIRQD (MSI) */
/* XHCI 0:14.0 (ivy only) */
Package() { 0x0014ffff, 0, 0, 19 },
/* High Definition Audio 0:1b.0 */
@@ -44,6 +49,11 @@ Method(_PRT)
Return (Package() {
/* Onboard graphics (IGD) 0:2.0 */
Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ /* PCI Express Graphics (PEG) 0:1.0 */
+ Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
+ Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
+ Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
/* XHCI 0:14.0 (ivy only) */
Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
/* High Definition Audio 0:1b.0 */