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authorAntonello Dettori <dev@dettori.io>2016-09-03 10:45:33 +0200
committerMartin Roth <martinroth@google.com>2016-09-10 04:54:53 +0200
commit7ea0fe5cbf749be1400d7094f5ecc2487fcdf163 (patch)
tree40bb7e0bdfd005df5e124d83d751fbd66de1ffd5 /src
parente6a5f608e197b9b31eb30b84bf3359123c1e58ac (diff)
northbridge/intel/e7505: transition away from device_t
Replace the use of the old device_t definition inside northbridge/intel/e7505. Change-Id: Ie819f380ec06667e11bcff3e9e993126a86b2c89 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16469 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/e7505/debug.c6
-rw-r--r--src/northbridge/intel/e7505/raminit.h2
2 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/e7505/debug.c b/src/northbridge/intel/e7505/debug.c
index 33f1ed18f8..022257c9b6 100644
--- a/src/northbridge/intel/e7505/debug.c
+++ b/src/northbridge/intel/e7505/debug.c
@@ -21,7 +21,7 @@ void print_debug_pci_dev(unsigned dev)
void print_pci_devices(void)
{
- device_t dev;
+ pci_devfn_t dev;
for (dev = PCI_DEV(0, 0, 0);
dev <= PCI_DEV(0xff, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {
@@ -54,7 +54,7 @@ void dump_pci_device(unsigned dev)
void dump_pci_devices(void)
{
- device_t dev;
+ pci_devfn_t dev;
for (dev = PCI_DEV(0, 0, 0);
dev <= PCI_DEV(0xff, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {
@@ -71,7 +71,7 @@ void dump_pci_devices(void)
void dump_pci_devices_on_bus(unsigned busn)
{
- device_t dev;
+ pci_devfn_t dev;
for (dev = PCI_DEV(busn, 0, 0);
dev <= PCI_DEV(busn, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {
diff --git a/src/northbridge/intel/e7505/raminit.h b/src/northbridge/intel/e7505/raminit.h
index 8eb4990364..979ae0ab49 100644
--- a/src/northbridge/intel/e7505/raminit.h
+++ b/src/northbridge/intel/e7505/raminit.h
@@ -6,7 +6,7 @@
#define MAX_DIMM_SOCKETS (MAX_NUM_CHANNELS * MAX_DIMM_SOCKETS_PER_CHANNEL)
struct mem_controller {
- device_t d0, d0f1; // PCI bus/device/fcns of E7501 memory controller
+ pci_devfn_t d0, d0f1; // PCI bus/device/fcns of E7501 memory controller
// SMBus addresses of DIMM slots for each channel,
// in order from closest to MCH to furthest away