summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2009-10-27 23:14:54 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2009-10-27 23:14:54 +0000
commit7782319c21b0011aac316a7da945dd0e6efa5933 (patch)
treecd4103ba9c623543eb25e79f18233d7f8c80d41b /src
parent312673ca729f2b3557a572a03ff6915460329286 (diff)
Prefix all build output file names of files which end up in the build
directory with "build/" for consistency (trivial, sort of). Also, drop printing of "config.g" input file, we usually only print generated/output files in the build output. Finally, rename non-existing COMPRESSFLAG variable to CBFS_PAYLOAD_COMPRESS_FLAG in a printf line. The build output now says PAYLOAD payload.elf l for payloads (the "l" specifies LZMA compression). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/arch/i386/Makefile.inc22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/arch/i386/Makefile.inc b/src/arch/i386/Makefile.inc
index 4278577caf..2d5fe4d29c 100644
--- a/src/arch/i386/Makefile.inc
+++ b/src/arch/i386/Makefile.inc
@@ -20,18 +20,18 @@ $(obj)/coreboot.rom: $(obj)/coreboot.bootblock $(obj)/coreboot_ram $(CBFSTOOL)
then \
$(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \
fi
- $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG)
+ $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG)
ifeq ($(CONFIG_PAYLOAD_NONE),y)
@printf " PAYLOAD none (as specified by user)\n"
else
- @printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(COMPRESSFLAG)\n"
- $(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
+ @printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n"
+ $(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
endif
ifeq ($(CONFIG_VGA_BIOS),y)
@printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
$(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
endif
- @printf " CBFSPRINT ./build/coreboot.rom\n\n"
+ @printf " CBFSPRINT build/coreboot.rom\n\n"
$(CBFSTOOL) build/coreboot.rom print
@@ -39,7 +39,7 @@ endif
# Build the bootblock
$(obj)/coreboot.bootblock: $(obj)/coreboot
- @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
+ @printf " OBJCOPY $(subst $(shell pwd)/,,$(@))\n"
$(OBJCOPY) -O binary $< $@
$(obj)/ldscript.ld: $(ldscripts) $(obj)/ldoptions
@@ -56,7 +56,7 @@ $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(src)/arch/i386/init/crt0.S.lb $(obj)/
$(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@
$(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld
- @printf " LINK $(subst $(obj)/,,$(@))\n"
+ @printf " LINK $(subst $(shell pwd)/,,$(@))\n"
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs)
$(NM) -n $(obj)/coreboot | sort > $(obj)/coreboot.map
@@ -64,27 +64,27 @@ $(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld
# i386 specific tools
$(obj)/option_table.h $(obj)/option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
- @printf " OPTION $(subst $(obj)/,,$(@))\n"
+ @printf " OPTION $(subst $(shell pwd)/,,$(@))\n"
$(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
$(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h $(obj)/config.h
- @printf " HOSTCC $(subst $(obj)/,,$(@))\n"
+ @printf " HOSTCC $(subst $(shell pwd)/,,$(@))\n"
$(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
#######################################################################
# Build the coreboot_ram (stage 2)
$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/config/coreboot_ram.ld #ldoptions
- @printf " CC $(subst $(obj)/,,$(@))\n"
+ @printf " CC $(subst $(shell pwd)/,,$(@))\n"
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/config/coreboot_ram.ld $(obj)/coreboot_ram.o
$(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
$(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
- @printf " CC $(subst $(obj)/,,$(@))\n"
+ @printf " CC $(subst $(shell pwd)/,,$(@))\n"
$(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\)
$(obj)/coreboot.a: $(objs)
- @printf " AR $(subst $(obj)/,,$(@))\n"
+ @printf " AR $(subst $(shell pwd)/,,$(@))\n"
rm -f $(obj)/coreboot.a
$(AR) cr $(obj)/coreboot.a $(objs)