diff options
author | David Hendricks <dhendrix@chromium.org> | 2013-02-15 16:18:28 -0800 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-02-19 19:00:54 +0100 |
commit | 6802dc8abe250abbe1b89532a9895b7c5d3f77f7 (patch) | |
tree | cbf6dad6e7b503a07c646148978fb3249e16f665 /src | |
parent | 249cdc39431362241d154b6d091228e3c4c4e028 (diff) |
armv7/snow: add CPU and RAM resources via allocator
This adds necessary device operations to add CPU and RAM resources.
Change-Id: Ief8f66627ef37f4fa786bfc3f7899529d3e5b037
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2419
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/armv7/boot/coreboot_table.c | 4 | ||||
-rw-r--r-- | src/cpu/samsung/exynos5250/Makefile.inc | 1 | ||||
-rw-r--r-- | src/cpu/samsung/exynos5250/cpu.c | 61 |
3 files changed, 62 insertions, 4 deletions
diff --git a/src/arch/armv7/boot/coreboot_table.c b/src/arch/armv7/boot/coreboot_table.c index 64f6a664e7..044f3d51e0 100644 --- a/src/arch/armv7/boot/coreboot_table.c +++ b/src/arch/armv7/boot/coreboot_table.c @@ -545,13 +545,11 @@ struct lb_memory *get_lb_mem(void) return mem_ranges; } -#if 0 static void build_lb_mem_range(void *gp, struct device *dev, struct resource *res) { struct lb_memory *mem = gp; new_lb_memory_range(mem, LB_MEM_RAM, res->base, res->size); } -#endif static struct lb_memory *build_lb_mem(struct lb_header *head) { @@ -562,12 +560,10 @@ static struct lb_memory *build_lb_mem(struct lb_header *head) mem_ranges = mem; /* FIXME: implement this */ -#if 0 /* Build the raw table of memory */ search_global_resources( IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, build_lb_mem_range, mem); -#endif /* FIXME: things die in cleanup_memory_ranges(), skip for now */ // lb_cleanup_memory_ranges(mem); return mem; diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 10c071a702..c9a9341641 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -27,6 +27,7 @@ ramstage-y += pinmux.c ramstage-y += power.c ramstage-y += soc.c ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c +ramstage-y += cpu.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c diff --git a/src/cpu/samsung/exynos5250/cpu.c b/src/cpu/samsung/exynos5250/cpu.c new file mode 100644 index 0000000000..0a49e1edc9 --- /dev/null +++ b/src/cpu/samsung/exynos5250/cpu.c @@ -0,0 +1,61 @@ +#include <console/console.h> +#include <device/device.h> + +#define RAM_BASE ((CONFIG_SYS_SDRAM_BASE >> 10) + (CONFIG_COREBOOT_ROMSIZE_KB)) +#define RAM_SIZE (((CONFIG_DRAM_SIZE_MB << 10UL) * CONFIG_NR_DRAM_BANKS) \ + - CONFIG_COREBOOT_ROMSIZE_KB) + +static void domain_read_resources(device_t dev) +{ + ram_resource(dev, 0, RAM_BASE, RAM_SIZE); +} + +static void domain_set_resources(device_t dev) +{ + assign_resources(dev->link_list); +} + +static unsigned int domain_scan_bus(device_t dev, unsigned int max) +{ + return max; +} + + +static struct device_operations domain_ops = { + .read_resources = domain_read_resources, + .set_resources = domain_set_resources, + .enable_resources = NULL, + .init = NULL, + .scan_bus = domain_scan_bus, +}; + +static void cpu_init(device_t dev) +{ +} + +static void cpu_noop(device_t dev) +{ +} + +static struct device_operations cpu_ops = { + .read_resources = cpu_noop, + .set_resources = cpu_noop, + .enable_resources = cpu_noop, + .init = cpu_init, + .scan_bus = 0, +}; + +static void enable_dev(device_t dev) +{ + /* Set the operations if it is a special bus type */ + if (dev->path.type == DEVICE_PATH_DOMAIN) { + dev->ops = &domain_ops; + } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { + dev->ops = &cpu_ops; + } +} + +struct chip_operations cpu_samsung_exynos5250_ops = { + CHIP_NAME("CPU Samsung Exynos 5250") + .enable_dev = enable_dev, +}; |