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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2017-09-29 01:37:00 +0200
committerMartin Roth <martinroth@google.com>2017-12-02 05:25:16 +0000
commit64d855dbb0d52b2e4486c48cb6161391b9abecb4 (patch)
treedf8712311cda133de2d8d7a3218a2ccb5a03516c /src
parentc0c31b6d1a91d8e69bce847a21884944dc679587 (diff)
arch/riscv: Remove supervisor_trap_entry
coreboot only maintains a single trap entry, because it only runs in machine mode. Change-Id: I7324d9c8897d5c4e9d4784e7bc2a055890eab698 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/22595 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/arch/riscv/trap_util.S10
1 files changed, 1 insertions, 9 deletions
diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S
index 3036f069ab..72a9ae1ced 100644
--- a/src/arch/riscv/trap_util.S
+++ b/src/arch/riscv/trap_util.S
@@ -107,15 +107,7 @@
.globl estack
.text
- .global supervisor_trap_entry
-supervisor_trap_entry:
- csrw mscratch, sp
- # load in the top of the machine stack
- la sp, _estack
- addi sp,sp,-MENTRY_FRAME_SIZE
- save_tf
- move a0,sp
- jal trap_handler
+
.global trap_entry
trap_entry:
csrw mscratch, sp