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authorMatt DeVillier <matt.devillier@puri.sm>2020-12-11 12:33:57 -0600
committerHung-Te Lin <hungte@chromium.org>2020-12-15 01:57:38 +0000
commit6452a9fcfc072f85101abf0f476e10c6727d6b69 (patch)
tree193c44077a227da97c5fe1e73d1b2f84f0099a3f /src
parentbde97082007775664ffff3c0efadc50ea9e50c40 (diff)
mb/purism/librem_mini: Adjust PL1/2 levels
While the Librem Mini (v1/v2) are more than capable of higher PL1/2, they currently ship with a 40W power supply, so set PL1/2 accordingly to avoid power spikes above the PSU rating (which can result in unexpected showdowns/reboots) Change-Id: Ia7f89e885f1af29cbbb67d6fb844257ba2b87417 Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48586 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
index 6b326f0c63..8fb84ce581 100644
--- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
+++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
@@ -7,8 +7,8 @@ chip soc/intel/cannonlake
# CPU (soc/intel/cannonlake/cpu.c)
# Power limit
register "power_limits_config" = "{
- .tdp_pl1_override = 25,
- .tdp_pl2_override = 51,
+ .tdp_pl1_override = 15,
+ .tdp_pl2_override = 28,
}"
# Enable Enhanced Intel SpeedStep