diff options
author | Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> | 2016-10-31 10:48:43 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-11-07 20:15:13 +0100 |
commit | 50198c117839ee01c331a827dc57b6293c989f34 (patch) | |
tree | da689ef8b42bc4e4449ac980d9c4e2fbb4e5d7e7 /src | |
parent | 37742f6870ec1d4b860769db25ef665cdb7c1615 (diff) |
mainboard/google/reef: update DMIC related pins configuration
CLK_B1(GPIO_80) and DATA_2(GPIO_83) pins needs to be
configured as native mode to use them for DMIC record
on other potential DMIC's.
DMIC blobs configure the clocks. For stereo & quad channel
record, both CLK_A1 and CLK_B1 are enabled.
For mono channel record, only CLK_A1 is enabled.
BUG=chrome-os-partner:56918
BRANCH=None
TEST=During DMIC record, check CLK_B1 and DATA_2 lines
Change-Id: I838009b85190de5360d593238e48c9593c1dc43a
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-on: https://review.coreboot.org/17199
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/reef/variants/baseboard/gpio.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c index c9fa3d350a..ae84e9cc9a 100644 --- a/src/mainboard/google/reef/variants/baseboard/gpio.c +++ b/src/mainboard/google/reef/variants/baseboard/gpio.c @@ -219,10 +219,10 @@ static const struct pad_config gpio_table[] = { /* DMIC or I2S4 */ PAD_CFG_NF(GPIO_79, NATIVE, DEEP, NF1), /* AVS_DMIC_CLK_A1 */ - PAD_CFG_GPI(GPIO_80, UP_20K, DEEP), /* unused */ + PAD_CFG_NF(GPIO_80, NATIVE, DEEP, NF1), /* AVS_DMIC_CLK_B1 */ PAD_CFG_NF(GPIO_81, NATIVE, DEEP, NF1), /* AVS_DMIC_DATA_1 */ PAD_CFG_GPI(GPIO_82, DN_20K, DEEP), /* unused -- strap */ - PAD_CFG_GPI(GPIO_83, UP_20K, DEEP), /* unused */ + PAD_CFG_NF(GPIO_83, NATIVE, DEEP, NF1), /* AVS_DMIC_DATA_2 */ /* I2S2 -- Headset amp */ PAD_CFG_NF(GPIO_84, NATIVE, DEEP, NF1), /* AVS_I2S2_MCLK */ |