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authorHuayang Duan <huayang.duan@mediatek.com>2020-07-23 13:44:17 +0800
committerHung-Te Lin <hungte@chromium.org>2020-08-06 03:03:53 +0000
commit4bcb63bdd804a9b6c3083394cd3e377eb5f7804b (patch)
treedaf4c58a7bb2654e42e228ea28ea62806f631ad0 /src
parentd4eb14aa3c91406db5db41cc7ac60f8196f150f2 (diff)
soc/mediatek/mt8183: Set MMU default map length to 8GB befor mem init
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui Change-Id: I072745933fe141cac26afd044836a564e345d036 Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43795 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/mediatek/common/mmu_operations.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/mediatek/common/mmu_operations.c b/src/soc/mediatek/common/mmu_operations.c
index 9550ba83fa..960d742d63 100644
--- a/src/soc/mediatek/common/mmu_operations.c
+++ b/src/soc/mediatek/common/mmu_operations.c
@@ -12,11 +12,11 @@ void mtk_mmu_init(void)
mmu_init();
/*
- * Set 0x0 to 4GB address as device memory. We want to config IO_PHYS
+ * Set 0x0 to 8GB address as device memory. We want to config IO_PHYS
* address to DEV_MEM, and map a proper range of dram for the memory
* test during calibration.
*/
- mmu_config_range((void *)0, (uintptr_t)4U * GiB, DEV_MEM);
+ mmu_config_range((void *)0, (uintptr_t)8U * GiB, DEV_MEM);
/* SRAM is cached */
mmu_config_range(_sram, REGION_SIZE(sram), SECURE_CACHED_MEM);