diff options
author | Mathew King <mathewk@chromium.org> | 2020-12-08 11:33:58 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-19 08:38:58 +0000 |
commit | 422501fb14780090527c9a45bcca6628cd6bba71 (patch) | |
tree | 3892b8ffd3ba9ff54e50f73669fab64db08f638e /src | |
parent | e75f1807e1150eaf777a12a0503a9b5b7d302bc7 (diff) |
mb/google/mancomb: Add new mainboard
Mancomb is a new Google mainboard with an AMD Cezanne SOC.
BUG=b:175143925
TEST=builds
Change-Id: I1264f44a0b986f7f7c89ac7b42f1e4e4119a35e6
Signed-off-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50007
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/mancomb/Kconfig | 39 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/Kconfig.name | 5 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/Makefile.inc | 8 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/board_info.txt | 6 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/bootblock.c | 9 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/chromeos.fmd | 33 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/dsdt.asl | 16 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/mainboard.c | 18 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/variants/baseboard/devicetree.cb | 5 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/variants/baseboard/include/baseboard/gpio.h | 6 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h | 6 |
11 files changed, 151 insertions, 0 deletions
diff --git a/src/mainboard/google/mancomb/Kconfig b/src/mainboard/google/mancomb/Kconfig new file mode 100644 index 0000000000..6cb5f1854e --- /dev/null +++ b/src/mainboard/google/mancomb/Kconfig @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +config BOARD_GOOGLE_BASEBOARD_MANCOMB + def_bool n + +if BOARD_GOOGLE_BASEBOARD_MANCOMB + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_16384 + select SOC_AMD_CEZANNE + +config FMDFILE + string + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" + +config MAINBOARD_DIR + string + default "google/mancomb" + +config MAINBOARD_PART_NUMBER + string + default "Mancomb" if BOARD_GOOGLE_MANCOMB + +config AMD_FWM_POSITION_INDEX + int + default 3 + help + TODO: might need to be adapted for better placement of files in cbfs + +config DEVICETREE + string + default "variants/baseboard/devicetree.cb" + +config MAINBOARD_FAMILY + string + default "Google_Mancomb" + +endif # BOARD_GOOGLE_BASEBOARD_MANCOMB diff --git a/src/mainboard/google/mancomb/Kconfig.name b/src/mainboard/google/mancomb/Kconfig.name new file mode 100644 index 0000000000..d9160e4894 --- /dev/null +++ b/src/mainboard/google/mancomb/Kconfig.name @@ -0,0 +1,5 @@ +comment "Mancomb" + +config BOARD_GOOGLE_MANCOMB + bool "-> Mancomb" + select BOARD_GOOGLE_BASEBOARD_MANCOMB diff --git a/src/mainboard/google/mancomb/Makefile.inc b/src/mainboard/google/mancomb/Makefile.inc new file mode 100644 index 0000000000..1e8a88c95d --- /dev/null +++ b/src/mainboard/google/mancomb/Makefile.inc @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +bootblock-y += bootblock.c + +ramstage-y += mainboard.c + +subdirs-y += variants/baseboard +CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include diff --git a/src/mainboard/google/mancomb/board_info.txt b/src/mainboard/google/mancomb/board_info.txt new file mode 100644 index 0000000000..cf13c45ddf --- /dev/null +++ b/src/mainboard/google/mancomb/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Mancomb +Category: desktop +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/mancomb/bootblock.c b/src/mainboard/google/mancomb/bootblock.c new file mode 100644 index 0000000000..dd4c1516b1 --- /dev/null +++ b/src/mainboard/google/mancomb/bootblock.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootblock_common.h> +#include <baseboard/variants.h> + +void bootblock_mainboard_early_init(void) +{ + /* TODO: Perform mainboard initialization */ +} diff --git a/src/mainboard/google/mancomb/chromeos.fmd b/src/mainboard/google/mancomb/chromeos.fmd new file mode 100644 index 0000000000..be43e8a02d --- /dev/null +++ b/src/mainboard/google/mancomb/chromeos.fmd @@ -0,0 +1,33 @@ +FLASH@0xFF000000 16M { + SI_BIOS { + RW_MRC_CACHE(PRESERVE) 64K + RW_SECTION_A 3M { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 256 + } + RW_SECTION_B 3M { + VBLOCK_B 8K + FW_MAIN_B(CBFS) + RW_FWID_B 256 + } + RW_ELOG(PRESERVE) 4K + RW_SHARED 16K { + SHARED_DATA 8K + VBLOCK_DEV 8K + } + RW_VPD(PRESERVE) 8K + RW_NVRAM(PRESERVE) 20K + SMMSTORE(PRESERVE) 4K + RW_LEGACY(CBFS) + WP_RO@8M 8M { + RO_VPD(PRESERVE) 16K + RO_SECTION { + FMAP 2K + RO_FRID 64 + GBB@4K 448K + COREBOOT(CBFS) + } + } + } +} diff --git a/src/mainboard/google/mancomb/dsdt.asl b/src/mainboard/google/mancomb/dsdt.asl new file mode 100644 index 0000000000..7b8982a645 --- /dev/null +++ b/src/mainboard/google/mancomb/dsdt.asl @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +DefinitionBlock ( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x00010001 /* OEM Revision */ + ) +{ + #include <acpi/dsdt_top.asl> + + #include <soc.asl> +} diff --git a/src/mainboard/google/mancomb/mainboard.c b/src/mainboard/google/mancomb/mainboard.c new file mode 100644 index 0000000000..3dc2c41d69 --- /dev/null +++ b/src/mainboard/google/mancomb/mainboard.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <device/device.h> + +static void mainboard_init(void *chip_info) +{ + /* TODO: Perform mainboard initialization */ +} + +static void mainboard_enable(struct device *dev) +{ + /* TODO: Enable mainboard */ +} + +struct chip_operations mainboard_ops = { + .init = mainboard_init, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb new file mode 100644 index 0000000000..519bd07fab --- /dev/null +++ b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +chip soc/amd/cezanne + device domain 0 on + end # domain +end # chip soc/amd/cezanne diff --git a/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/gpio.h new file mode 100644 index 0000000000..b94afac4bf --- /dev/null +++ b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/gpio.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_GPIO_H__ +#define __BASEBOARD_GPIO_H__ + +#endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h new file mode 100644 index 0000000000..927af2f913 --- /dev/null +++ b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_VARIANTS_H__ +#define __BASEBOARD_VARIANTS_H__ + +#endif /* __BASEBOARD_VARIANTS_H__ */ |