diff options
| author | John Su <john_su@compal.corp-partner.google.com> | 2018-06-13 14:28:46 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-06-15 08:14:27 +0000 |
| commit | 31ff06a2da7380ecfe56365992d013b8ad0f7760 (patch) | |
| tree | 9960338dc83bd91ea5385138b10c75563ebae8de /src | |
| parent | 56dfc9375101e63987dba42626cd2ef2bd3badfa (diff) | |
mb/google/poppy/variants/nami: Update DPTF table from version 1.5
Update dptf.asl and TCC parameters from tuning of the thermal team.
BUG=b:72974136
TEST=Match the result from DPTF UI
Change-Id: Ic0ffc169ad3939cacb46824ed23999c61a23d2c4
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/27086
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/poppy/variants/nami/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl | 20 |
2 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 4d912d3863..d4f262e00a 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -282,7 +282,7 @@ chip soc/intel/skylake register "speed_shift_enable" = "1" - register "tcc_offset" = "10" # TCC of 90C + register "tcc_offset" = "3" # TCC of 97C register "psys_pmax" = "101" # PCH Trip Temperature in degree C diff --git a/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl index 05d5552d88..af40ab905f 100644 --- a/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl @@ -23,23 +23,23 @@ #define DPTF_TSR0_SENSOR_ID 0 #define DPTF_TSR0_SENSOR_NAME "Thermal_Sensor_Remote_CPU" -#define DPTF_TSR0_PASSIVE 81 +#define DPTF_TSR0_PASSIVE 75 #define DPTF_TSR0_CRITICAL 125 #define DPTF_TSR0_ACTIVE_AC0 50 #define DPTF_TSR0_ACTIVE_AC1 47 #define DPTF_TSR0_ACTIVE_AC2 45 -#define DPTF_TSR0_ACTIVE_AC3 43 -#define DPTF_TSR0_ACTIVE_AC4 41 +#define DPTF_TSR0_ACTIVE_AC3 42 +#define DPTF_TSR0_ACTIVE_AC4 39 #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "Thermal_Sensor_Remote_PMIC" -#define DPTF_TSR1_PASSIVE 78 +#define DPTF_TSR1_PASSIVE 75 #define DPTF_TSR1_CRITICAL 125 #define DPTF_TSR1_ACTIVE_AC0 50 #define DPTF_TSR1_ACTIVE_AC1 47 #define DPTF_TSR1_ACTIVE_AC2 45 -#define DPTF_TSR1_ACTIVE_AC3 43 -#define DPTF_TSR1_ACTIVE_AC4 41 +#define DPTF_TSR1_ACTIVE_AC3 42 +#define DPTF_TSR1_ACTIVE_AC4 39 #define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_FAN_CONTROL @@ -63,7 +63,7 @@ Name (DFPS, Package () { /* Control, Trip Point, Speed, NoiseLevel, Power */ Package () {90, 0xFFFFFFFF, 6700, 220, 2200}, Package () {69, 0xFFFFFFFF, 5800, 180, 1800}, - Package () {52, 0xFFFFFFFF, 5000, 145, 1450}, + Package () {56, 0xFFFFFFFF, 5000, 145, 1450}, Package () {46, 0xFFFFFFFF, 4900, 115, 1150}, Package () {36, 0xFFFFFFFF, 3900, 90, 900} }) @@ -76,15 +76,15 @@ Name (DART, Package () { * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6, * AC7, AC8, AC9 */ - \_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 90, 69, 52, 46, 36, 0, 0, + \_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 90, 69, 56, 46, 36, 0, 0, 0, 0, 0 }, Package () { - \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 90, 69, 52, 46, 36, 0, 0, + \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 90, 69, 56, 46, 36, 0, 0, 0, 0, 0 }, Package () { - \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 90, 69, 52, 46, 36, 0, 0, + \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 90, 69, 56, 46, 36, 0, 0, 0, 0, 0 } }) |