diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-11-21 08:40:55 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-03 08:04:18 +0100 |
| commit | 2fd006a3e335570fda1e3b2bf00288103e9fac6d (patch) | |
| tree | 5ac80e777999d935153ffb02e68ef2faab823b2e /src | |
| parent | 7d8cde756e0e4d1fc14734eca721e4a55046b2d1 (diff) | |
AGESA Hudson/Yangtze: Remove unused GPP configuration in devicetree
GPP config from devicetree.cb is not implemented for fam15tn/fam16kb.
Also only for asus/f2a85-m the configuration value matched the actual
programming.
Change-Id: Ic7a9aa1360f4ba35d202f3f7dd1fc3c20a52dde0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7600
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/amd/parmer/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/thatcher/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/asus/f2a85-m/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/asus/f2a85-m_le/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/lenovo/g505s/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/chip.h | 1 |
7 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/amd/parmer/devicetree.cb b/src/mainboard/amd/parmer/devicetree.cb index b63ba12fa6..b37691ca14 100644 --- a/src/mainboard/amd/parmer/devicetree.cb +++ b/src/mainboard/amd/parmer/devicetree.cb @@ -68,7 +68,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson device pci 18.0 on end diff --git a/src/mainboard/amd/thatcher/devicetree.cb b/src/mainboard/amd/thatcher/devicetree.cb index 5fc4648642..25210ba779 100644 --- a/src/mainboard/amd/thatcher/devicetree.cb +++ b/src/mainboard/amd/thatcher/devicetree.cb @@ -83,7 +83,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson device pci 18.0 on end diff --git a/src/mainboard/asus/f2a85-m/devicetree.cb b/src/mainboard/asus/f2a85-m/devicetree.cb index 5158f19794..b08a63d962 100644 --- a/src/mainboard/asus/f2a85-m/devicetree.cb +++ b/src/mainboard/asus/f2a85-m/devicetree.cb @@ -116,7 +116,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.2 off end # unused device pci 15.3 off end # unused - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson device pci 18.0 on end diff --git a/src/mainboard/asus/f2a85-m_le/devicetree.cb b/src/mainboard/asus/f2a85-m_le/devicetree.cb index 84c8a0ef26..245fcaac75 100644 --- a/src/mainboard/asus/f2a85-m_le/devicetree.cb +++ b/src/mainboard/asus/f2a85-m_le/devicetree.cb @@ -115,7 +115,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 on end # PCIe 1 onboard gigabit device pci 15.2 off end # unused device pci 15.3 off end # unused - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson device pci 18.0 on end diff --git a/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb b/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb index 895437b1c6..2791262701 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb +++ b/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb @@ -68,7 +68,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson device pci 18.0 on end diff --git a/src/mainboard/lenovo/g505s/devicetree.cb b/src/mainboard/lenovo/g505s/devicetree.cb index 3a518abb46..e9718baafc 100644 --- a/src/mainboard/lenovo/g505s/devicetree.cb +++ b/src/mainboard/lenovo/g505s/devicetree.cb @@ -72,7 +72,6 @@ chip northbridge/amd/agesa/family15rl/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson device pci 18.0 on end diff --git a/src/southbridge/amd/agesa/hudson/chip.h b/src/southbridge/amd/agesa/hudson/chip.h index 21b8cd2dbc..4a832ff7a3 100644 --- a/src/southbridge/amd/agesa/hudson/chip.h +++ b/src/southbridge/amd/agesa/hudson/chip.h @@ -22,7 +22,6 @@ struct southbridge_amd_agesa_hudson_config { - u8 gpp_configuration; u8 sd_mode; }; |